31
the resistance of 1 k
Ω
should be applied.
Definitions of pins are as follows:
1. Sorting result (NG/DQNG, P1/PASS, P2/HI, P3/LO): output, low-asserted.
2. WAIT (busy): output, high-asserted. This signal can be used to control outer
machine’s operation of dealing with equipment. When the signal is valid, the
instrument is in the state of measurement and calculation.
3. EOC (A/D completion): output, high-asserted. When this signal is output,
the DUT’s measurement (A/D conversion) has completed, but probably the
calculation is still in procession. When the output is low, it must be ensured
that test terminal and the DUT keep good connection. And when it’s high, it’s
allowed to move next DUT to test terminal to prepare for next measurement.
4. START (start): input, rising edge and it’s valid when the maintaining time of
high level is more than 2.5ms. This signal is supplied to HANDLER’s input
terminal from outside.
5. COM: interface’s grounding terminal.
Figure 2-10 shows the timing diagram of the Handler interface. (A, B and C are
the three component measured. Component A is sorted to Bin P1, B is sorted to
P1 and C is sorted to P2.)
Figure 2-10.The Timing Diagram of Handler Interface
T1: T1 is the pulse width of START which must be more than 2.5ms. When
START goes high, the instrument starts a measurement. START signal should
return low before the WAIT signal goes low; otherwise the next START signal
will not be effective. If there in no external START signal, the START key on the
front panel can also be used.
T2: During the time of T2 the instrument performs A/D conversion, correction,
calculation, and comparison. The value of T2 depends on the measurement
speed. At the end of T2, the comparison results are outputted to the component
handler.
T3: This is the period when last measurement is finished and the next
measurement has not been started. The handler is free to position the next
component for measurement.
T4: Instrument performs A/D conversion during the time of T4.
The comparison output signals are effective until the signals are output next
