Themis USPIIe-USB Hardware Manual Download

Page: 180 / 184

Index

Index-7

Themis Computer

sensor

2-12

subsystem

5-5

TGA3D/3D+

2-6

model configurations

xviii

1-1

C-1

F-1

Time-of-Day (TOD) clock.

See

TOD

1-14

3-6

TOD/NVRAM battery

1-14

3-6

traps

6-1

Tundra Universe II

3-5

4-1

TXFIFO

4-4

UltraSPARC-IIe

CPU block diagram

3-2

processor

3-1

reset control register

6-6

Universe II

3-5

architectural diagram

4-4

automatic slot identification

4-6

features

4-1

hardware power-up options

4-7

interrupt and interrupt handler

4-17

mailbox registers

4-18

Miscellaneous Control Register

(MISC_CTL)

4-5

semaphores

4-18

SYSCON Module

4-5

system controller

4-6

VME and PCI interrupters

4-17

VMEbus interrupt handling

4-18

Unpacking the USPIIe

xix

USB

connector

A-8

pinouts

A-8

USB Ports

Port 2

1-12

Ports 0 and 1

1-11

user-defined rotary switch

2-6

USPIIe-USB

2P2 and 2P3 boards

A-11

Advanced PCI Bridge (APB)

3-4

baseboard

2-1

block diagram

2-2

configurations

1-2

ejector handles

C-2

model configurations

xviii

1-1

C-1

paddle boards, Standard & Multiple I/O

2-7

PCI I/O controller

3-5

photo of

xvii

reset architecture

3-3

reset structure

6-1

Reset, Interrupt, and Clock (RIC)

3-3

slot configurations

F-1

system specifications

2-8

Vdd-core

B-8

VME

slot configurations

F-1

diagram of

F-3

Status LEDs

A-10

SYSRST

1-13

system controller.

See

SYSCON

VME P1 connector

A-1

pinouts

A-2

PMC Carrier Board

A-12

pinouts

A-13

VME P2

connection

1-9

1-10

connector

A-3

connector pinouts

A-4

signals, software alarm

2-3

solder beads

pin signal interpretation

B-15

VME P2 connector

PMC Carrier Board

A-14

SB2801–SB2832 configuration

B-15

B-17

solder-bead settings

B-14

VME P2 connector pinouts

PMC Carrier Board

A-15

VME64 specification

4-6

VME64-type handles

C-2

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Summary of Contents for USPIIe-USB

Page 1: ...service in house repair center WE BUY USED EQUIPMENT Sell your excess underutilized and idle used equipment We also offer credit for buy backs and trade ins www artisantg com WeBuyEquipment REMOTE IN...

Page 2: ...476 14 77 89 Themis Computer Americas and Pacific Rim 47200 Bayside Parkway Fremont CA 94538 Phone 510 252 0870 Fax 510 490 5529 World Wide Web http www themis com USPIIe USB Hardware Manual Version 1...

Page 3: ...r the product s described herein RESTRICTED RIGHTS LEGEND Use duplication or disclosure by the United States Government is subject to the restrictions set forth in DFARS 252 227 7013 c 1 ii and FAR 52...

Page 4: ...in Table B 8 page B 12 to reflect change in default status and setting descriptions Other assorted minor revisions and corrections throughout the manual Version 1 2 August 2005 Version 1 1 October 20...

Page 5: ...iv Themis Computer USPIIe USB Hardware Manual Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 6: ...Ports A B TTYA and TTYB 1 9 1 4 1 1 Front Panel Connection 1 9 1 4 1 2 VME P2 Connection 1 9 1 4 2 Serial Ports C D TTYC and TTYD 1 9 1 4 3 Serial Ports E F TTYE F 1 10 1 4 3 1 Front Panel Connection...

Page 7: ...or and Memory Subsystems 2 8 2 6 2 I O Subsystem 2 9 2 6 3 Auxiliary Functions 2 12 2 7 Environmental Specifications 2 13 2 8 Estimated Power Requirements 2 13 3 Hardware Overview 3 1 3 1 Baseboard 3...

Page 8: ...s 4 7 4 3 Slave Image Programming 4 9 4 3 1 VME Slave Images 4 9 4 3 1 1 VMEbus Fields 4 10 4 3 1 2 PCI Bus Fields 4 11 4 3 1 3 Control Fields 4 11 4 3 2 PCI Bus Target Images 4 12 4 3 2 1 PCI Bus Fie...

Page 9: ...6 3 6 2 4 Software Initiated Reset SIR 6 3 6 3 Reset Sources 6 4 6 3 1 Push Button Reset 6 4 6 3 2 Power Management Resets 6 4 6 3 3 VMEbus Resets 6 4 6 3 4 2 Level Watchdog Resets 6 5 6 3 5 Software...

Page 10: ...e Boards A 23 A 5 1 Standard Paddle Board A 23 A 5 1 1 SCSI Port A Connector A 23 A 5 1 2 Serial TTY Port B Connector A 24 A 5 2 Multiple I O Paddle Board A 26 A 5 2 1 Ultra160 SCSI Port A 68 pin fema...

Page 11: ...Ie USB 1 Single VME Slot C 4 C 2 2 USPIIe USB 2G Baseboard 1 Graphics Board C 5 C 2 3 USPIIe USB 3G2 Baseboard 2 Graphics Boards C 6 C 2 4 USPIIe USB 3GP2 Baseboard 1 Graphics Board and C 7 2 PMC Carr...

Page 12: ...ess Translation for VMEbus to PCI Bus Transfers 4 11 Figure 4 3 Address Translation for PCI Bus to VMEbus Transfers 4 13 Figure 4 4 Memory Mapping in the Special PCI Target Image 4 17 Figure A 1 Baseb...

Page 13: ...Panels Baseboard and Graphics Board C 5 Figure C 4 3 Slot Front Panels Baseboard and 2 Graphics Boards C 6 Figure C 5 3 Slot Front Panels Baseboard Graphics Board and C 7 2 PMC Carrier Boards Figure...

Page 14: ...II Power Up Options 4 7 Table 4 3 PCI Configuration Base Address 0 Register PCI_BS0 4 9 Table 4 4 PCI Configuration Base Address 1 Register PCI_BS1 4 9 Table 4 5 VMEbus Fields for VMEbus Slave Image...

Page 15: ...arrier Slot 3 with 0 Bits of User I O A 20 Table A 14 Serial Port E and F Connector Pinout A 21 Table A 15 RJ45 Ethernet B Pinout A 22 Table A 16 Paddle Board SCSI Port A Connector Pinouts A 24 Table...

Page 16: ...on B 15 Table B 14 PMC Carrier Board VME P2 Connector SB2801 SB2832 Configuration B 17 Table C 1 USPIIe USB Model Configurations C 1 Table C 2 PS 2 and USB Protocols and Connectors C 3 Table D 1 Stand...

Page 17: ...xvi Themis Computer USPIIe USB Hardware Manual Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 18: ...le board computer see photo below Baseboard only This USPIIe USB Hardware Manual describes all models of the USPIIe USB a SPARC version 9 0 compliant computer with a VME bus interface and an UltraSPAR...

Page 19: ...of the equipment USPIIe USB Models The USPIIe USB has a total of seven models see Table 1 All models are based on a combination of four different VME boards the USPIIe USB Baseboard the TGA Graphics B...

Page 20: ...rite code for the USPIIe USB without the benefit of an operating system or real time kernel will require additional data sheets Please refer to the section Related References on page xxi for infor mat...

Page 21: ...tches jumpers and beads on your system are set to meet your application requirements In addition to information contained in the USPIIe USB Hardware Manual Themis P N 110534 022 the USPIIe USB Softwar...

Page 22: ...he USPIIe USB Appendix B DIP Switch Jumper Pin and Solder Bead Configurations provides a detailed description of each of the user configurable jumper pins and DIP switches on the USPIIe USB as well as...

Page 23: ...ot 3 x Command Supplement for PCI Sun Microsystems 805 1627 10 The SPARC Architecture Manual Version 9 David L Weaver and Tom Germond editors PTR Prentice Hall SunVTS 2 1 SunVTS User s Guide Part No 8...

Page 24: ...described Note A note provides additional information that may be helpful in carrying out the procedure or action being described Caution A caution describes a procedure or action that may result in...

Page 25: ...ation updates and product enhancement notifications Our Customer Support department is committed to providing the best product sup port in the computer industry Customer support is available 8am 5pm P...

Page 26: ...welcome your comments and suggestions You can email your comments to us at docfeedback themis com or fill out and return the Reader Comment card at the end of this manual Please include the document p...

Page 27: ...USPIIe USB Hardware Manual xxvi Themis Computer Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 28: ...ase number Table 1 1 USPIIe USB Model Configurations Model Baseboard TGA3D 3D Graphics Board PMC Carrier Board VME Slot 1 VME Slot 2 VME Slot 3 2 PMC Slots VME Slot 2 or 3 3 PMC Slots VME Slot 2 or 3...

Page 29: ...iate for your application Appendix B DIP Switch Jumper Pin and Solder Bead Configurations gives a complete listing of jumper pin and solder bead definitions including default settings If you have to c...

Page 30: ...es from Themis Table 1 2 Front Panel DIN Settings SB3502 SB3503 through SB3506 Front Panel 8 Pin Mini DIN Configuration Comments Open Short 1 2 PS 2 keyboard mouse Accessible only through spe cial spl...

Page 31: ...minator is always enabled The SCSI A bus on the other hand can have several configurations which determine whether or not the bus is terminated at the USPIIe USB Possible SCSI A bus configurations are...

Page 32: ...Check Configurations 1 5 Themis Computer Figure 1 1 USPIIe USB and Paddle Board Installed in a VME Backplane 1 649 453 351 479 062 303 Artisan Technology Group Quality Instrumentation Guaranteed 888 8...

Page 33: ...vice is attached to the P2 connector on off Termination OFF Termination ON Termination OFF Note The SCSI A channel actually has two terminating circuits One is associ ated with the front panel SCSI A...

Page 34: ...provides connectors for SCSI Port A SE mode Serial Port B RS232 Power fail software alarm and high temperature trip signals Polyswitch Vcc power fuse See section Paddle Boards on page D 1 for a more c...

Page 35: ...Serial Port B 3 Row or Connector Wide LVD Parallel Port Power Indicator LED 2 950 0 635 SCSI 0 465 4 175 3 500 Center to Center 0 210 Both USB connectors allow access to the same USB Port signals ther...

Page 36: ...mode TTYB can be configured in either RS232 or RS422 mode see JP3401 from the Front Panel and RS232 only from the VME P2 bus 1 4 1 2 VME P2 Connection TTYA RS232 only and TTYB RS232 only are also ava...

Page 37: ...le I O Paddle Board or you may also provide your own connectivity or call Themis Computer for a cost estimate on building a custom Paddle Board 1 4 5 PMC Expansion Module Slots The Baseboard contains...

Page 38: ...le Board SCSI A connections simultaneously see Figure 1 2 on page 1 6 You can verify proper physical connection by executing the OpenBoot command probe scsi for SCSI A or probe scsi all for SCSI A and...

Page 39: ...Board or you may also provide your own connectivity or call Themis Computer for a cost estimate on build ing a custom Paddle Board 1 4 10 Miscellaneous I O The following I O signals are also available...

Page 40: ...onfigured using extensions to the Sun OBP monitor pro gram Details on configuring the VME interface are described in the USPIIe USB Software Manual Themis P N 110102 023 1 5 1 Using OBP to Program the...

Page 41: ...directly on top of the timekeeper chip the battery provides power backup for approximately 10 years In the event the battery must be replaced follow these steps 1 Locate the lithium battery on the to...

Page 42: ...ure 1 5 TOD NVRAM Battery Replacement A Remove phillips head screw Battery holder securing the battery holder B Carefully pry battery long sides upward with long nose pliers C exposing the 4 pin batte...

Page 43: ...the PCB see Figure 1 5 Carefully push the battery into the socket when the four battery pins have engaged the socket holes The battery will be fully seated when you hear a snap as you push down 5 Rep...

Page 44: ...C IIe processor and proprietary coplanar memory boards The Baseboard is available at processor speeds of 650 600 or 550 MHz 512 KB L2 cache see Table 2 1 below and Figure 2 1 on page 2 2 Table 2 1 CPU...

Page 45: ...fff 0000 PC mode 1ff f000 0000 Sun mode Rmtv_sel Vcc 272PBGA 10MB s 33 Mhz 32 bit 132 MB s Bus 1 B A Bus 2 Secondary PCI 80 MB s 80 MB s downstream bus If there is a bridge then Bus f0 FF PCI Bus 4 7f...

Page 46: ...LVD SCSI port B Ultra2 LVD PMC Module slot 0 The back panel VMEbus P2 interface provides signals for Serial port A TTYA RS232 RXD and TXD Serial port B TTYB RS232 RXD TXD and modem signals Serial port...

Page 47: ...user I O on PMC Module slot 2 is not used On the other hand 32 bits of user I O may be made available on both PMC Module slot 1 and PMC Module slot 2 For example if TTYA is routed to the VME P2 backp...

Page 48: ...7 selectable on Baseboard ID 1 PMC 1 Audio Out I C Bus 2 Audio Rotary Switch Buffer TTY E TTY F DUART Flash PROM AD1881A SME2300 PCI to PCI Intel 21154 64 bit PMC Module 1 64 I Os ID 2 PMC 2 VME P2 Co...

Page 49: ...GA3D 3D Graphics Board consult the TGA3D 3D Graphics Board Installation Guide Themis part number 110102 021 Note OBP version 2 4 records the value of the User defined Rotary Switch as an OBP environme...

Page 50: ...ure trip signals Polyswitch Vcc power fuse 2 4 2 Multiple I O Paddle Board The Multiple I O Paddle Board is a 1 slot wide 3 or 5 row connector VME P2 paddle board P N 110778 001 providing I O connecti...

Page 51: ...Table 2 4 contain processor and memory subsection specifications Table 2 3 Processor Specifications Feature Function Specifications Processor UltraSPARC IIe Processor Speed 550 600 and 650 MHz Perform...

Page 52: ...ry Specifications Feature Function Specifications Main Memory Custom Memory Modules for 128 MB to 4 GB gigabytes Memory Bus Interface 72 bit Data Path from CPU including 8 bit ECC 2 to 1 Interleave to...

Page 53: ...ion Yes b RS232 only Tx Rx Serial Port B Async RS232 front FP rear P2 422 front only Slot 1 Faceplateb only if no P2 connection Slot 1 Faceplateb only if no P2 connection Yes b RS232 only full modem S...

Page 54: ...USPIIe The Baseboard is always in slot 1 the PMC Carrier Board is in slot 2 a RS232 port supports only RXD and TXD signals b Serial ports A B must be configured by solder bead SB3501 to be accessed th...

Page 55: ...p pendix C Front Panel Diagrams VME Status LEDs Four LEDs located on Front Panel of the Baseboard See USPIIe USB 1 Single VME Slot page C 4 Ap pendix C Front Panel Diagrams Reset Switch Momentary Push...

Page 56: ...at 50 C 600 MHz minimum Table 2 8 USPIIe USB Non operating Environmental Specifications Description Minimum Value Maximum Value Temperature Range 40 C 85 C Humidity Range a relative non condensing at...

Page 57: ...2 14 Themis Computer USPIIe USB Hardware Manual Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 58: ...am of Figure 3 1 on page 3 2 The CPU is available in operating speeds of 550 600 or 650 MHz The architecture complies with the SPARC V9 instruction set which enables the system to use a wide range of...

Page 59: ...3 2 Themis Computer USPIIe USB Hardware Manual Figure 3 1 UltraSPARC IIe CPU Block Diagram Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 60: ...2 accepts all interrupts from the USPIIe USB subsystems up to 41 interrupts and delivers encoded interrupts on the six 6 inter rupt lines routed to the UltraSPARC IIe microprocessor The interrupts rec...

Page 61: ...ont Panel Dia grams 3 1 3 1 Advanced PCI Bridge APB The USPIIe USB Advanced PCI Bridge SME2411 interfaces directly with the UltraSPARC IIe microprocessor and concentrates two 2 32 bit 33MHz PCI buses...

Page 62: ...TYC RS232 and TTYD RS232 serial ports 3 1 5 Symbios SCSI Controller The Symbios SCSI Controller SYM53C896 provides two 2 LVD UltraWide SCSI 3 interfaces 80 MB sec In order to maximize speed it is atta...

Page 63: ...3 Flash EPROM devices 4 MB They are located on the Baseboard bottom side solder side and are accessible through the Baseboard Ebus2 Any Flash can be jumper configurable as the boot device The boot Fla...

Page 64: ...Error Correction Code ECC A single bit error in a 64 bit word is corrected without loss of a cycle In designing the memory subsystem considerable attention was paid to minimizing overall power consump...

Page 65: ...3 8 Themis Computer USPIIe USB Hardware Manual Figure 3 4 SDRAM Memory Subsystem Bank 0 Bank 1 Bank 2 Bank 3 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 66: ...connector In this case all 64 signals are avail able on the J1004 connector of PMC 1 3 3 OpenBoot PROM The OpenBoot PROM OBP can be accessed through the Ebus2 OBP code is con tained in Flash Memory an...

Page 67: ...3 10 Themis Computer USPIIe USB Hardware Manual Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 68: ...to the PCI both directions Programmable DMA controller with linked list support A broad range of VMEbus address and data transfer modes A32 A24 A16 master and slave transfer except for A64 and A40 D6...

Page 69: ...bus Slave Channel supports all of the addressing and data transfer modes which are documented in the VME64 specification The Universe II does not support the A64 mode and the modes intended to augment...

Page 70: ...Locked cycles RMW cycles are not supported with the unaligned or D24 Cycles In order to support the VMEbus broadcast capability Universe II has four location monitors The location monitor s image con...

Page 71: ...cations i e A40 and MD32 The Uni verse II is compatible with all the VMEbus modules that conform to pre VME64 specifica tion The Universe II as the VMEbus Master supports RMW and ADOH It accepts BERR...

Page 72: ...VMEbus Time out 0000 Disable 0001 16 s 0010 32 s 0011 64 s 0100 128 s 0101 256 s 0110 512 s 0111 1024 s Others RESERVED 0011 R W 26 VARB VMEbus Arbitration Mode 0 Round Robin 1 Pri ority 0 R W 25 24...

Page 73: ...4 2 4 1 Automatic Slot Identification The Universe II supports two types of Auto ID functionality Auto Slot ID as described by the VME64 specification Proprietary Method which is developed by Tundra R...

Page 74: ...power up to operate in the default configuration listed in Table 4 2 It should be noted that all power up options are latched only at the positive edge of PWRRST they are loaded when SYSRST PWRRST and...

Page 75: ...0 VA 5 2 PCI Bus Sizeb MISC_STAT LCLSIZE 32 bit REQ64 PCI CSR Image Space PCI_CSR BM Disabled VA 14 PCI Register Access PCI_BS0 PCI_BS1 SPACE Refer to Table 4 3 and Table 4 4 VA 1 PCI Bus Sizec MISC_S...

Page 76: ...VMEbus slave image The Universe II will only accept accesses to the VMEbus from within the programmed limits of the VMEbus slave image Table 4 3 PCI Configuration Base Address 0 Register PCI_BS0 a BIt...

Page 77: ...ster Enable BM bit of the PCI_CS register must be set in order for the image to accept posted writes from an external VMEbus master If this bit is cleared while there is data in the VMEbus Slave Poste...

Page 78: ...us slave image is enabled using the EN bit of the control field The control field also specifies how reads and writes are processed either as a coupled transfer or a posted write At power up all image...

Page 79: ...n criteria The PCI target images are A32 capable only For accesses other than A32 the Spe cial PCI Target Image may be used refer to Section 4 3 2 4 Special PCI Target Image on page 4 15 Of the eight...

Page 80: ...d to the low address range Figure 4 3 Address Translation for PCI Bus to VMEbus Transfers Table 4 8 PCI Bus Fields for PCI Bus Target Image Field Register Bits Description base BS 31 12 or BS 31 16 in...

Page 81: ...egister Bits Description base BS 31 12 or BS 31 16 in LSIx_BS Translates PCI Bus Address to VMEbus Address bound BD 31 12 or BD 31 16 in LSIx_BD 8 16 32 or 64 bits address space LAS in LSIx_CTL A16 A2...

Page 82: ...6 For each region the upper 64 KB map to VMEbus A16 space while the remaining portion map to VMEbus A24 space The addressing of this slave image is depicted in Figure 4 2 on page 4 11 The special PCI...

Page 83: ...R W 0 Program Data AM Code Each of the four bits specifies Program Data AM code for the corresponding 16 mB region The lower order bits correspond to the lower order address regions 0 Data 1 Program 1...

Page 84: ...h as VIRQ 7 0 If a hardware and software source are assigned to the same VMEbus VIRQ n pin the software source always has higher priority Interrupt sources mapped to the PCI bus interrupts are generat...

Page 85: ...x Registers Universe II contains four 32 bit mailbox registers that provide an additional commu nication path between the PCI bus and the VMEbus The mailboxes support read and write accesses from eith...

Page 86: ...lds refer to Section 4 3 Slave Image Programming on page 4 9 4 4 6 DMA Controller The Universe II utilizes an internal DMA controller for high performance data trans fer between the VMEbus and the PCI...

Page 87: ...4 20 Themis Computer USPIIe USB Hardware Manual Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 88: ...ogic of the USPIIe USB Implements an extensive boot address decoder and mapping control of the flashes Provides miscellaneous registers to control the behavior of the USPIIe USB Implements a 2 level W...

Page 89: ...nd ID of the base_Usp2e_PLD 1 flash_status 0x1FF F120 0002 Boot address space mapping 2 vme_slot_id 0x1FF F120 0003 Usp2e VME id status register 3 vme_reset_mode 0x1FF F120 0004 Usp2e VME sysreset sys...

Page 90: ...it 0x1FF F120 0024 Watchdog 2 limiter loaded value 15 watchdog 2 status 0x1FF F120 0028 Watchdog 2 status 16 watchdog int mask 0x1FF F120 0040 Watchdog interrupt mask 17 semaphore status 0x1FF F120 00...

Page 91: ...IIe USB uses several voltage sources in order to operate 5V 3 3V and Vdd core CPU are monitored by the SMS44 voltage monitor controller which generates a power ok signal to the PLD only if the three v...

Page 92: ...A temperature threshold can be defined by software If the CPU junction temperature exceeds the programmed thresholds W83782D generates an over temperature indicator signal to the PLD If the CPU therma...

Page 93: ...5 6 Themis Computer USPIIe USB Hardware Manual Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 94: ...is taken when Trap_Level Max_Trap_Level 1 One of the reset request signals POR XIR WDR becomes active A reset request SIR is issued when the Trap_Level Max_Trap_Level if Trap_Level Max_Trap_Level the...

Page 95: ...on the conditions and type of reset the processor may propagate the reset throughout the system as in the case of a POR or reset part of the system i e the processor core itself 6 2 UltraSPARC IIe Res...

Page 96: ...rror_state XIR brings it to a RED_state 6 2 3 Watchdog Reset WDR On the USPIIe USB a Watchdog Reset WDR is generated in response to the error_state of the UltraSPARC IIe It is generated internally to...

Page 97: ...be set until software clears it This is done to allow software to detect the source of the reset The POR bit will not be set 6 3 2 Power Management Resets The on board power management system in conju...

Page 98: ...y the VMEbus No components on the USPIIe USB are effected by a software VMEbus reset 6 3 4 2 Level Watchdog Resets A 2 Level Watchdog reset as explained in Section 5 4 on page 5 3 is implemented in th...

Page 99: ...tiated Reset SIR These two resets are initiated within the processor core and affect only the processor Table 6 1 UltraSPARC IIe Reset_Control_Register Field Bits Value Description Type Reserved 63 32...

Page 100: ...ch board refer to Appendix C Front Panel Diagrams A 1 Baseboard VME P1 Connector Type 5 row VME64 see Figure A 1 and Table A 1 page 2 Figure A 1 Baseboard VME P1 Connector Orientation 1 32 Row Z Row A...

Page 101: ...D VME WRITE VME BR2 VME AM5 3 3V 1 15 Reserved 2 GND VME BR3 VME A23 GA3 16 GND VME DTACK VME AM0 VME A22 3 3V 1 17 Reserved 2 GND VME AM1 VME A21 GA4 18 GND VME AS VME AM2 VME A20 3 3V 1 19 Reserved...

Page 102: ...er Failure HI TEMP Asserted when critical temperature is reached SW ALARM User defined Asserted on a write access to address 0x1ff f110 0000 Refer to the USPIIe USB Software Manual The VME P2 is a VME...

Page 103: ...I_A_D 3 SCSI_A_D 3 17 LP_Busy SSER_RXD_D_P2 VME_D 19 SCSI_A_D 4 SCSI_A_D 4 18 GND SSER_TXD_A_P2 VME_D 20 SCSI_A_D 5 SCSI_A_D 5 19 LP_ack SSER_RXD_A_P2 VME_D 21 SCSI_A_D 6 SCSI_A_D 6 20 GND SSER_TXD_B_...

Page 104: ...ual SCSI 2 80 MB sec Connector 68 Pin 0 8 mm Pitch Connector Part Number HDRA E68WILFDT IEC SL Figure A 3 Baseboard SCSI A and B Connector Orientation 1 34 35 68 SCSI Port B SCSI Port A 1 34 68 35 Fro...

Page 105: ...49 GND Ground 16 Diff Sense Sense Differential 50 GND Ground 17 TermPower Termination Power 51 TermPower Termination Power 18 TermPower Termination Power 52 TermPower Termination Power 19 Open Not Co...

Page 106: ...art Number STEWART SS 6488S A NF Figure A 4 Ethernet A Connector Orientation Front View of PCB Speed LED Link Status LED 8 1 Table A 4 RJ45 Ethernet A Pinout Pin Signal Name 1 TXD 2 TXD 3 RXD 4 TXGND...

Page 107: ...n Chapter 1 USPIIe USB Installation and Table B 6 on page B 9 Appendix B DIP Switch Jumper Pin and Solder Bead Configurations Figure A 5 Front Panel Mini DIN Connector 4 1 5 3 8 6 Front View 2 7 Table...

Page 108: ...1 A1 2 NC RXD_B_P 2 3 NC TXD_B_P 3 4 GND GND 4 5 A_DTR_FP DTR_B_N 5 6 A_TXD_FP TXD_B_N 6 7 A_RXD_FP RXD_B_N 7 B8 8 A_DCD_FP DCD_B_N 8 A8 B9 9 NC CTS_B_P 9 A9 10 NC DTR_B_P 10 11 NC DCD_B_P 11 12 NC NC...

Page 109: ...er Shutdown Orange Static USPIIe USB system is shutting down Power OK Yellow Static System power is operational Enableb Green Static System is up a If the VME Master LED is ON the USPIIe USB currently...

Page 110: ...PMC Carrier Board occupies the second slot position on the USPIIe USB 2P2 and USPIIe USB 2P3 Components on the USPIIe USB 2P2 include PMC Module slot 1 PMC Module slot 2 Serial TTY Port E RS232 Seria...

Page 111: ...isy chaining of IACK and BG signals There is no need to jumper those signals manually for the position occupied by the PMC Carrier Board Connector Type VME64 Figure A 8 PMC Carrier Board VME P1 Connec...

Page 112: ...IN_BG1 NC 8 NC DAISY_CHAIN_BG2 NC 9 GND DAISY_CHAIN_BG2 GND 10 NC DAISY_CHAIN_BG3 NC 11 GND DAISY_CHAIN_BG3 NC 12 NC NC NC 13 NC NC NC 14 NC NC NC 15 GND NC NC 16 NC NC NC 17 GND NC NC 18 NC NC NC 19...

Page 113: ...ombination of signals solder bead switchable from PMC Module slots 1 and 2 Serial Ports E TTY E and F TTY F the front panel User Rotary Switch and the I2C bus see Table B 14 in Appendix B DIP Switch J...

Page 114: ...12 User switchablea GND User switchablea 13 User switchablea VCC User switchablea 14 User switchablea NC User switchablea 15 User switchablea NC User switchablea 16 User switchablea NC User switchable...

Page 115: ...witch This is the default configuration 2 64 user signals from PMC Slot 1 connector J1004 and none from Slot 2 3 32 user signals from PMC Slot 1 connector J1004 and 32 from Slot 2 con nector J1104 Bot...

Page 116: ...IO C11 22 PMC IO A11 23 PMC IO C12 24 PMC IO A12 25 PMC IO C13 26 PMC IO A13 27 PMC IO C14 28 PMC IO A14 29 PMC IO C15 30 PMC IO A15 31 PMC IO C16 32 PMC IO A16 33 PMC IO C17 34 PMC IO A17 35 PMC IO C...

Page 117: ...8 NC 29 NC 30 NC 31 NC 32 NC 33 PMC IO C17 34 PMC IO A17 35 PMC IO C18 36 PMC IO A18 37 PMC IO C19 38 PMC IO A19 39 PMC IO C20 40 PMC IO A20 41 PMC IO C21 42 PMC IO A21 43 PMC IO C22 44 PMC IO A22 45...

Page 118: ...NC 25 NC 26 NC 27 NC 28 NC 29 NC 30 NC 31 NC 32 NC 33 PMC IO C1 34 PMC IO A1 35 PMC IO C2 36 PMC IO A2 37 PMC IO C3 38 PMC IO A3 39 PMC IO C4 40 PMC IO A4 41 PMC IO C5 42 PMC IO A5 43 PMC IO C6 44 PMC...

Page 119: ...le 24 Not available 25 Not available 26 Not available 27 Not available 28 Not available 29 Not available 30 Not available 31 Not available 32 Not available 33 Not available 34 Not available 35 Not ava...

Page 120: ...Signal Description TTY F Signal PC board is marked B1 1 DCD Carrier Detect DCD 1 A1 2 RXD Receive Data RXD 2 3 TXD Transmit Data TXD 3 4 DTR Data Terminal Ready DTR 4 B5 5 SIG GND Signal Ground SIG G...

Page 121: ...ectors Connector Type Mini Stereo Jack Connector Part Number ASTRON AT JY3540 050B Figure A 13 Dual Stereo Audio Connector Speed LED Link Status LED Front View 8 1 Table A 15 RJ45 Ethernet B Pinout Pi...

Page 122: ...ure trip signals Polyswitch Vcc power fuse See the section entitled Paddle Boards on page D 1 for a more complete description A 5 1 1 SCSI Port A Connector Connector Type High density 68 Pin Female Sh...

Page 123: ...Table A 17 on page A 25 for pinout designations Figure A 15 Paddle Board Serial Port B Connector 1 5 6 9 Table A 16 Paddle Board SCSI Port A Connector Pinouts Pin Signal Name Pin Signal Name 1 GND 35...

Page 124: ...rt of the automatic SCSI termination sensing logic The SCSI P2 signal will be forced to ground by the mating SCSI connector when attached thus disabling the on board terminator see Figure 1 2 page 1 6...

Page 125: ...e Out stereo jack Audio Line In stereo jack Figure A 16 USPIIe USB Multiple I O Paddle Board Audio Line In Audio Line Out PS 2 Port Dual USB Ports Serial Port D Serial Port A Serial Port C Serial Port...

Page 126: ...Serial Port B RS 232 with modem support See Table A 2 on page A 4 for a list of pinout signals A 5 2 5 Dual USB Port The USPIIe USB does not support the dual USB port connector on the Multiple I O Pad...

Page 127: ...2760 2009 R 53481 2009 P The custom Memory Module is installed onto the USPIIe USB Baseboard with one connector to attach it to the Baseboard see Figure A 18 Figure A 17 Line Out In Stereo Audio Conne...

Page 128: ...n see Figure 1 1 on page 1 5 between VME slots only one Memory Module can be installed onto a USPIIe USB Baseboard stacking not supported 1 200 2 199 J0901 Receptacle Mounted on Baseboard top side com...

Page 129: ...A 30 Themis Computer USPIIe USB Hardware Manual Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 130: ...ctory configurable and must not be altered by the user If a solder bead requires re configuration contact Themis Cus tomer Service B 2 Field Configurable B 2 1 DIP Switch The PMC Carrier Board contain...

Page 131: ...the small size of the DIP switch it may be necessary to use a magnifying glass Figure B 1 Location and Configuration of SW1101 Top Side VME P2 VME Serial F Serial E P0602 P0501 DIP Switch SW1101 SW110...

Page 132: ...VME system controller is pulled up forc ing the USPIIe USB to be a non system controller at power up Short 2 3 Setting the VME controller as the system controller is determined by JP1401 JP1501 ON Tra...

Page 133: ...I operating mode VME system controller vs non VME system controller is determined by autosensing VME bus grant 3 during power up See Chapter 4 Universe II Description c When the USPIIe USB is accessed...

Page 134: ...Mode Auto Sensed Install JP1801 Jumper Front Panel only LVDa or SEb YES either LVD or SE mode NO VME P2 Connector 3 row VME backplane SE only NO see Appendix Table A 2 page A 4 YES 5 row VME backplan...

Page 135: ...ltraSPARC IIe IIi SME 1532C VME P1 VME P2 Component Side JP2701 JP2702 JP2703 JP2704 JP2705 JP2706 JP1601 JP2201 JP1801 Legend Jumper OFF Jumper ON Pin 1 JP3701 JP3401 JP2203 JP2202 JP1501 JP1401 JP14...

Page 136: ...er Bead Settings Bottom Side Solder Bead Settinga Description SB0501 Short 1 2 PWR_HEALTHY Short 2 3 SCAN_TRST is driven by PLD SB0801 Short CPU CLK PLL clock phase locked loop can be programmed norma...

Page 137: ...Graphics Board is connected to Baseboard SB3202 Short 1 2 Manufacturing use only Setting is dependent on SCSI B termination components installed Short 2 3 SB3204 Short Manufacturing use only Setting i...

Page 138: ...n Short 1 2 PS 2 keyboard mouse Accessible only through special split pigtail cable Themis 110104 001 8 pin mini DIN to 6 pin keyboard DIN and 6 pin mouse DIN Open Short 2 3 Not Applicable Short Short...

Page 139: ...04 SB2702 SB2704 SB2201 SB2203 SB2202 SB2204 SB2205 SB1811 SB1813 SB1810 SB1812 SB3504 SB3505 SB3506 SB3403 SB3001 SB0801 SB3501 SB1801 SB1805 SB1806 SB1807 SB1201 SB0501 SB3202 Legend Actual location...

Page 140: ...led hence the path between the contacts is open Figure B 4 on page B 16 provides the location of the Carrier Board solder beads Remember that pin 1 is indicated on the board by a dot and or a thick ba...

Page 141: ...Add In mode factory use only SB1302 Short Assign Ethernet interupt to PCI interupt Open Block Ethernet interupt factory use only SB1801 Short Disable 5 MHz I2 C clock Open Enable 5 MHz I2 C clock SB18...

Page 142: ...on see Table B 11 page B 14 Open SB3002 Short Flash PROM selected is writable Open Flash PROM selected is not writable SB3003 Short 1 2 Enable 5V Flash programming voltage Vpp Short 2 3 Enable 12V Fla...

Page 143: ...ngs 2P2 and 2P3 SB2839 SB2840 SB2833 2 PMCs in First I O slot slot 2 Short Short Short 3 PMCs in First I O slot slot 2 Short Short Open 2 PMCs in Second I O slot slot 3 Short Open Short 3 PMCs in Seco...

Page 144: ...Module slot 1 PMC Module slot 2 Serial Port E Serial Port F User Switch I2 C bus signals Table B 13 VME P2 Pin Signal Interpretation Signal Interpretation PMC1_IOn The nth pin of PMC Module slot 1 PMC...

Page 145: ...18 SB2815 SB2813 SB2811 SB2809 SB2807 SB2805 SB2803 SB2801 SB2831 SB2829 SB2827 SB2825 SB2823 SB2821 SB2819 SB2817 SB2816 SB2814 SB2812 SB2810 SB2808 SB2806 SB2804 SB2802 SB2834 SB2836 SB2838 SB2840 S...

Page 146: ...MC2_IO47 A9 PMC1_IO18 SSER_E_TXD PMC2_IO50 C9 PMC1_IO17 SSER_F_TXD PMC2_IO49 A10 PMC1_IO20 SSER_E_RXD PMC2_IO52 C10 PMC1_IO19 SSER_F_RXD PMC2_IO51 A11 PMC1_IO22 SSER_E_CTS PMC2_IO54 C11 PMC1_IO21 SSER...

Page 147: ...able B 14 PMC Carrier Board VME P2 Connector SB2801 SB2832 Configuration Continued a VME P2 Connector Row A see Table A 9 VME P2 Connector Row C see Table A 9 Pin Pin Signal withSB1 4 Shorted Pin Sign...

Page 148: ...r To avoid confusion each front panel illustration in Appendix C has a table correlating PCI address with PMC Module slot Table C 1 USPIIe USB Model Configurations Model Baseboard TGA3D 3D Graphics Bo...

Page 149: ...ent handles can be installed C 1 2 1 VME64 type Handles Only When VME64 type handles are installed make sure to secure all ejector handles with the mating pins that are shipped with the system see Fig...

Page 150: ...tive graphics of the front panels for each USPIIe USB model configuration listed in Table C 1 on page C 1 see Figure C 2 on page C 4 through Figure C 8 on page C 10 Table C 2 PS 2 and USB Protocols an...

Page 151: ...SCSI B PMC Module 0 LEDs VME Status User Shutdown Power OK Enable System Status Serial A PMC Module 0 PCI Address 0 USPIIe 1 Addressing U S B 1 0 USB Ports 0 1 optional DIN connector is standard or Du...

Page 152: ...Master Slave Serial B PS 2 Keyboard Mouse Reset Switch SCSI A SCSI B PMC Module 0 LEDs VME Status User Shutdown Power OK Enable System Status Serial A Board Mating Screw Board Mating Screw Board Matin...

Page 153: ...s Baseboard PMC Module 0 PMC Module 1 PMC Module 2 PCI Address 0 USPIIe 3G2 Addressing 1 2 PMC Module 0 PMC Module 1 PMC Module 2 See Figure C 1 for Baseboard front panel description U S B 1 0 USB Por...

Page 154: ...rd 2 PMC Carrier Board PMC Module 3 PMC Module 2 PMC Module 0 PMC Module 0 PMC Module 1 PMC Module 2 PCI Address 0 USPIIe 3GP2 Addressing 1 3 PMC Module 3 2 PMC Module 1 See Figure C 1 for Baseboard f...

Page 155: ...MC Module 3 PMC Module 2 PMC Module 4 PMC Module 0 PMC Module 1 PMC Module 2 PCI Address 0 USPIIe 3GP3 Addressing 1 4 PMC Module 3 3 PMC Module 4 2 PMC Module 1 PMC Module 0 See Figure C 1 for Baseboa...

Page 156: ...Headphones Out PMC Module 1 See Figure C 1 for Baseboard front panel description See Table B 8 page B 13 Ethernet B Serial E Port Serial F Port PMC Module 0 PMC Module 1 PMC Module 2 PCI Address 0 US...

Page 157: ...panel description PMC Module 3 PMC Module 0 PMC Module 1 PMC Module 2 PCI Address 0 USPIIe 2P3 Addressing 3 2 PMC Module 3 1 PMC Module 0 U S B 1 0 USB Ports 0 1 optional DIN connector is standard wh...

Page 158: ...D 1 Baseboard Figure D 1 on page D 2 identifies front panel major board surface components and connectors as seen from the top side of the Baseboard D 2 PMC Carrier Board Figure D 2 on page D 3 and Fi...

Page 159: ...Serial Port B SCSI Port A SCSI Port B PMC Carrier Board Riser Connector ICHIP 2 Interrupt Controller Dual SCSI Controller SCSI A B SYM53C896 Sun APB PCI to PCI Bridge SME2411 Intel 21154 PCI to PCI Br...

Page 160: ...rd Riser Connectors underneath on solder side Audio Out Rotary Switch Sun Rio Ethernet Controller STP2003 U1301 Phyter DP83843 U1501 Serial F Serial E P0602 P0501 P0501 connects to the Baseboard P0602...

Page 161: ...ent Side PMC Module Outline P2702 P2601 PMC Module PMC Module PMC Carrier Board Riser Connectors underneath on solder side P0602 P0501 P0501 connects to the Baseboard P0602 is not presently used Secon...

Page 162: ...rements of the Paddle Board are given in Figure 1 1 page 1 5 Chapter 1 1 deep connector to connector outside to outside J0205 Pin 1 5V fused Pin 2 Ground J0205 J0206 Table D 1 Standard Paddle Board Co...

Page 163: ...Line Out PS 2 Port Dual USB Ports Serial Port D Serial Port A Serial Port C Serial Port B 3 Row or Connector Wide LVD Parallel Port Power Indicator LED 2 950 0 635 SCSI 0 465 4 175 3 500 Center to Cen...

Page 164: ...ss line A 39 0 as specified in ANSI VME64 Specification A64 Addressing on address line A 63 0 as specified in ANSI VME64 Specification APB Advanced PCI Bridge Arbitration The process of assigning a re...

Page 165: ...ally in a PROM or similar device Referred to as OBP in IEEE 1275 standards Supported in the USPIIe implementation release versions 3 10 x and later These versions come with the motherboard The user ma...

Page 166: ...for OpenBoot PROM This refers to a program that consists of code executable by the UltraSPARC IIe CPU The Code is responsible for initialization of the hardware and booting the system to bring up the...

Page 167: ...tes from a Slave to a Master Read Modify Write Cycle A VMEbus cycle used to read from and then write to a Slave location without permitting any other Master to access that location during that cycle R...

Page 168: ...e data structure that main tains address translation information Separate TSBs reside both in the MMU and the IOM TSOP Thin Small Outline Package A very thin surface mount chip package with gull wing...

Page 169: ...E 6 Themis Computer USPIIe USB Hardware Manual Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 170: ...board Table F 1 summarizes all model configurations Table F 1 USPIIe USB Model Configurations Model Baseboard TGA3D 3D Graphics Board PMC Carrier Board VME Slot 1 VME Slot 2 VME Slot 3 2 PMC Slots VM...

Page 171: ...USPIIe USB Hardware Manual F 2 Themis Computer Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 172: ...oard Baseboard Baseboard Baseboard Baseboard Baseboard Model USPIIe USB 2P2 P3A Model USPIIe USB 2P3 G2A 1 1 Graphics Model USPIIe USB 2G P3B G2A 3 1 1 Graphics Model USPIIe USB 3GP3 G2A 1 Graphics 1...

Page 173: ...Themis Computer USPIIe USB Hardware Manual F 4 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Page 174: ...ns 2 12 specifications 2 12 B back panel VMEbus P2 interface 2 3 backplane jumper settings 2 8 baseboard A 5 back panel VMEbus P2 interface 2 3 diagram of front panel component and con nector side D 2...

Page 175: ...aphics board and 3 PMC Carrier Boards C 8 baseboard front panel component and con nector side D 2 double slot front panels baseboard and 2 PMC Carrier Boards C 9 double slot front panels baseboard and...

Page 176: ...xix interrupt Universe II 4 17 interrupt controller 3 3 interrupters VME and PCI 4 17 J jumper pins B 1 baseboard B 3 boot device settings B 5 combined JP1401 JP1402 config urations B 4 illustraton o...

Page 177: ...port printer 1 10 2 3 2 7 PC 133 timing 3 7 PCI Configuration Base Address 0 Register PCI_BS0 4 9 PCI bus 3 4 fields 4 11 4 15 fields for PCI bus target images 4 14 fields for special PCI bus 4 15 fi...

Page 178: ...P Reset 6 4 A 11 R RDFIFO 4 3 reader comment card 1 2 references related xxi register access at power up 4 7 registering Your SPARC 5 64 2S2E xxiv registers MISC_CTL 4 5 PLD 5 2 special PCI target ima...

Page 179: ...tion of B 10 CPU speed settings B 9 front panel DIN settings B 9 memory module B 9 PMC Carrier Board B 11 audio I O settings B 13 illustration of B 16 revision settings B 14 selection settings B 14 se...

Page 180: ...e USB 2P2 and 2P3 boards A 11 Advanced PCI Bridge APB 3 4 baseboard 2 1 block diagram 2 2 configurations 1 2 ejector handles C 2 model configurations xviii 1 1 C 1 paddle boards Standard Multiple I O...

Page 181: ...rrupt handling 4 18 lock commands 4 3 master 4 10 master interface 4 3 resets 6 4 slave channel 4 2 slave images 4 9 control fields 4 12 system controller 3 5 to PCI Bus interface 4 1 voltage sensors...

Page 182: ...puter 3185LaurelViewCourt Fremont CA94538 Attn PublicationsDepartment Place Stamp Here Fold here tape at top to seal Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artis...

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