77
SLOS743L – AUGUST 2011 – REVISED MARCH 2017
Product Folder Links:
Applications, Implementation, and Layout
Copyright © 2011–2017, Texas Instruments Incorporated
7.2
Layout Considerations
Keep all decoupling capacitors as close to the IC as possible, with the high-frequency decoupling
capacitors (10 nF) closer than the low-frequency decoupling capacitors (2.2 µF).
Place ground vias as close as possible to the ground side of the capacitors and reader IC pins to minimize
possible ground loops.
TI recommends not using any inductor sizes smaller than 0603, as the output power can be compromised.
If smaller inductors are necessary, output performance must be confirmed in the final application.
Pay close attention to the required load capacitance of the crystal, and adjust the two external shunt
capacitors accordingly. Follow the recommendations of the crystal manufacturer for those values.
There should be a common ground plane for the digital and analog sections. The multiple ground sections
or islands should have vias that tie the different sections of the planes together.
Ensure that the exposed thermal pad at the center of the reader IC is properly laid out. It should be tied to
ground to help dissipate any heat from the package.
All trace line lengths should be made as short as possible, particularly the RF output path, crystal
connections, and control lines from the reader to the microprocessor. Proper placement of the TRF7970A,
microprocessor, crystal, and RF connection or connector help facilitate this.
Avoid crossing of digital lines under RF signal lines. Also, avoid crossing of digital lines with other digital
lines when possible. If the crossings are unavoidable, 90° crossings should be used to minimize coupling
of the lines.
Depending on the production test plan, consider possible implementations of test pads or test vias for use
during testing. The necessary pads or vias should be placed in accordance with the proposed test plan to
enable easy access to those test points.
If the system implementation is complex (for example, if the RFID reader module is a subsystem of a
greater system with other modules (
Bluetooth
, Wi-Fi, microprocessors, and clocks), special considerations
should be taken to ensure that there is no noise coupling into the supply lines. If needed, special filtering
or regulator considerations should be used to minimize or eliminate noise in these systems.
For more information/details on layout considerations, see the
TRF796x HF-RFID Reader Layout Design
.
7.3
Impedance Matching TX_Out (Pin 5) to 50
Ω
The output impedance of the TRF7970A when operated at full power out setting is nominally 4 + j0 (4
Ω
real). This impedance must be matched to a resonant circuit and TI recommends matching circuit from
4
Ω
to 50
Ω
, as commercially available test equipment (for example, spectrum analyzers, power meters,
and network analyzers) are 50-
Ω
systems.
shows an impedance-matching reference circuit.
shows a Smith chart simulation based on this circuit. This section explains how the values were
calculated.
Starting with the 4-
Ω
source, the process of going from 4
Ω
to 50
Ω
can be represented on a Smith Chart
simulator (available from
http://www.fritz.dellsperger.net/
). The elements are combined where appropriate
(see
).
