6–15
closed for the duration of the entire clocking sequence which is 4.4 ms or greater
(125
µ
s
×
35 bits = 4.4 ms).
At the conclusion of the count, the one-shot timer U5 is edge triggered by the output of the
counter-comparator U7. The output from U5 enables the EEPROM programming-pulse ramp generator that
is made up of Q1 and Q2. When U5 goes high (for approximately 13 ms), transistor Q1 turns on. U5 goes
high and turns off Q2, and the voltage on OSCC of the TMS3637 is allowed to ramp from 5.5 V to 17 V using
the RC time constant established by R10 and C5. The required ramp characteristics to successfully program
the EEPROM are defined in this data manual (see Figure 3–4). After the U5 time expires, the voltage on
OSCC again returns to 5.5 V (approximately one diode drop above 5 V) and the TMS3637 is programmed.
The U5 timer normally outputs one pulse when the circuit is powered up. This is inherent of the timer device.
To prevent the timer from outputting this pulse and inadvertently programming the TMS3637, a power-on
reset RC combination is included. When power is first applied to the circuit, timer U5 remains in the clear
state until capacitor C3 can charge through resistor R6, preventing the generation of a programming pulse.
After the programming button is released, the circuit again returns to its steady-state mode where counter
U6 is held in a cleared state and the shift resisters U9 – U13 are always loaded with the current code on the
DIP switches SW1 – SW4.
Summary of Contents for TMS3637P
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