Texas Instruments TMS3637P, Data Manual

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5–12
further increases the security of the device by not recognizing the correct received code until it is repeated
two, four, or eight times within a period of time specified by an external RC combination described in the
following paragraphs.
When the TMS3637 is configured as a train receiver, connect an external resistor and capacitor in parallel
between TIME and V
CC
, which sets the length of time the device searches for two, four, or eight correct
received codes. When the device receives two, four, or eight correct codes (not necessarily in succession)
within the time constant of the external RC network, a valid VTR pulse is placed on OUT at the conclusion
of the RC time constant.
The number of codes in the train required is determined by the setting of bits CD and CE as shown in
Table 5–7.
Table 5–7. Bits CD and CE in Train Receiver
CD CE TRAIN
1 0 2 codes
0 1 4 codes
1 1 8 codes
5.11.3 Q-State Receiver (CG = 0, CH = 0, CD, CE)
When the TMS3637 is configured as a receiver (CA = CC = 0) and EEPROM bits CG and CH are both
cleared to 0, the device is configured as a Q-state receiver. Bits CB, CF, and CI must also be set to specify
modulated or normal modes, analog or logic (for normal mode only), and noninverting or inverting format
of the output code.
The Q-state receiver is similar to a train receiver, except that when a train of one, two, four or eight codes
are recognized as valid, OUT toggles. After power-on reset, OUT is floating, since OUT is an open-drain
output. As with the train receiver, OUT can change value only after the RC time constant present on TIME.
Use Table 5–8 to determine the setting of bits CD and CE.
Table 5–8. Bits CD and CE in Q-State Receiver
CD CE TRAIN
0 0 1 code
1 0 2 codes
0 1 4 codes
1 1 8 codes
5.12 Receiver Modes
Figure 5–7 shows all possible receiver combinations. The bit values are also shown that determine the mode
of operation.