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TMS320F280x SDFlash Programming Utilities

F280x SDFlash Algo V1.1

Texas Instruments Inc. 2

SDFlash Algo Disclaimer

These algorithms are based on PRELIMINARY Flash APIs for initial TMS silicon sampling.
Please check the Spectrum Digital website for future updates.

The SDFlash Algorithm files in this download include the F280x Flash Application Program
Interface (Flash API) libraries V3.02:

Flash2808_API_V302.lib

Flash2806_API_V302.lib

Flash2802_API_V302.lib

Flash2801_API_V302.lib

Texas Instruments Inc. (TI) reserves the right to update or change any material included with
this release. This includes:

The API functional behavior based on continued TMS320F280x testing.

Improvements in algorithm performance and functionality.

It is the user’s responsibility to check for future updates to the SDFlash Algo Files based on
any updates to the F280x Flash APIs and to use the latest version available for their F280x
silicon.

Updates to the API will be posted on the Texas Instruments Inc website (www.ti.com) and
can also be obtained by contacting Texas Instruments’ support. Updates to the SDFlash
algorithm files will also be posted on the Spectrum Digital website
(www.spectrumdigital.com.)

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Summary of Contents for TMS320F280 Series

Page 1: ...sed on the following Flash APIs from TI TMS320F2808 Flash API V3 02 TMS320F2806 Flash API V3 02 TMS320F2802 Flash API V3 02 TMS320F2801 Flash API V3 02 This download includes SDFlash algorithm files used to interface the TMS320F2808 TMS320F2806 TMS320F2802 and TMS320F2801 FLASH APIs V3 02 to the SDFlash JTAG flash utility SDFlash is a product of Spectrum Digital Inc www spectrumdigital com Documen...

Page 2: ...truments Inc TI reserves the right to update or change any material included with this release This includes The API functional behavior based on continued TMS320F280x testing Improvements in algorithm performance and functionality It is the user s responsibility to check for future updates to the SDFlash Algo Files based on any updates to the F280x Flash APIs and to use the latest version availab...

Page 3: ...ord Considerations 17 9 SDFlash User Options 18 9 1 Specify Which Sectors to Erase Erase User Option 1 18 9 2 Configure Flash and OTP wait states Verify User Option 1 and Verify User Option 2 21 9 3 CPU Frequency and PLL Multiplier Configuration Toggle Test User Option 3 22 10 Depletion Recovery Algorithm 24 11 Troubleshooting Tips 25 11 1 DSP Reset Fails 25 11 2 All Operations 25 11 3 Erase Fails...

Page 4: ...w be used for the toggle test As before the pin number is specified in hex for example GPIO34 is 0022 Beta4 Updated to preliminary API V200 Beta3 Updated the API to beta2 to fix an erase by sector issue Beta2 The Beta1 version of the SDFlash linker cmd file used the memory block L1 as the buffer location it was incorrectly labled as L0 This memory block is not present on the F2801 devices and thus...

Page 5: ... without resetting the device This will help avoid permanently locking the CSM Do not program the CSM passwords with all 0x0000 SDFlash does not support the XDS560 scan controller You should not run SDFlash and Code Composer at the same time This results in two different applications trying to control the DSP During programming SDFlash will have complete control of the device No user application c...

Page 6: ...ms are Obsolete and No Longer Recommended 1 Recommended SDFlash Version Blank 0x0000 beta1 beta4 V1 0 or Later 2 A 0x0001 beta1 beta4 V1 0 or Later 2 B 0x0002 beta1 beta4 V1 0 or Later 2 Later 0x0002 beta1 beta4 V1 0 or Later 2 1 Previous versions of the SDFlash algorithms are based on Flash APIs that are obsolete and no longer recommended for use API Version 2 00 F2808_API_V200 lib F2806_API_V200...

Page 7: ...n turn make calls to the Flash API Library to perform operations on the flash array Note because the SDFlash interface is separate from the algorithm file the version of the SDFlash interface will differ from the version of the algorithm file SARAM Buffer SDFlash Algo File CPU OTP and FLASH ARRAY JTAG SDFlash Wrapper Flash API SDFlash Front End F280x 281x DSP PC SDFlash Algorithum File Flash Data ...

Page 8: ...V1 00 SPRC191 Running an Application from Internal Memory on the TMS320F281x DSP SPRA958 This application note is written for the 281x family of DSPs but can be applied to the 280x family as well 6 Quick Start Guide The following is a step by step guide for using the SDFlash utility to program your F280x device This quick start guide will refer to the following default directory locations CCS defa...

Page 9: ... indicating the processor and version of the utilities Note If you had installed an earlier release of SDFlash on your system you may have additional sub directories to those shown such as an algo directory With the release of SDFlash V1 3 the algo directory was replaced with the myprojects directory Presence of this directory will not effect the operation of SDFlash 6 5 Run SDFlash Load the suppl...

Page 10: ...get Tab Driver This is the Code Composer Studio TM emulation driver dvr file that is used to communicate with the target The driver files can be found in the CCS drivers directory default for the eZdsp CCS drivers sdgo28xxeZdspusb dvr dvr default for other 510PP SPI515 etc CCS drivers sdgo28x dvr Emulator Address ID default is 378 for the 510pp it is 510 for the USB driver This address must match ...

Page 11: ...ided with the algorithm is a simple data address pattern The code security module password locations are not programmed by the sample image That is the CSM password locations are left erased all 0xFFFF s so that the CSM can easily be unlocked If you have your own out file ready to be programmed you can specify that file as the data file The sample image Flash Data File is located at F2801 SDFlash ...

Page 12: ... 0x000A PLL x10 2 mode and CPU frequency 100MHz CAUTION The erase and program operations MUST be configured for the CPU clock rate SYSCLKOUT at which they will run This configuration is VITAL for proper operation of the algorithm As supplied the algorithm is configured for PLLCR 0x000A PLL x10 2 mode and CPU frequency 100MHz For custom CPU frequency and PLL multiplier you must follow the instructi...

Page 13: ...ency toggle test described in section 9 3 is ok 6 12 Optional Repeat erase programming for each device to be programmed If additional devices are to be programmed the target can be powered down and a new target connected without closing the SDFlash utility Once the new target is connected reset the part Device Reset and erase program verify Device Flash the device as described in 6 10 and 6 11 6 1...

Page 14: ...your system s specific requirements as described below The following steps describe how to compile a new SDFlash algorithm file for a custom frequency and PLL Control Register PLLCR setting 7 1 Using Code Composer Studio CCS load the projects for your device There is one project per operation and all must be re compiled for the new PLL configuration These are the CCS projects used to build the SDF...

Page 15: ...te of the CPU SYSCLKOUT in nanoseconds This is done by removing the leading in front of the correct line Only one line should be uncommented The file lists a number of commonly occurring clock rates If your CPU clock rate is not listed then provide your own definition using the examples as a guideline For example Suppose the final CPU clock rate will be 80 Mhz This corresponds to a 12 5 nS cycle t...

Page 16: ... Exit Code Composer Studio 7 7 Run the CPU frequency and PLL multiplier configuration toggle test described in section 9 3 from SDFlash to verify the configuration When run this test will toggle a selected GP I O pin at a known frequency This will allow you to confirm that the algorithms are properly configured for the CPU frequency and PLL multiplier you specified CAUTION It is strongly recommend...

Page 17: ...f280x_V1_0 f2801 flash28 SDFlash2801_Erase pjt SDFlash2801_Program pjt SDFlash2801_Verify pjt SDFlash2801_DepRecover pjt F2802 Install Dir SDFlash myprojects tif280x_V1_0 f2802 flash28 SDFlash2802_Erase pjt SDFlash2802_Program pjt SDFlash2802_Verify pjt SDFlash2802_DepRecover pjt F2806 Install Dir SDFlash myprojects tif280x_V1_0 f2806 flash28 SDFlash2806_Erase pjt SDFlash2806_Program pjt SDFlash28...

Page 18: ...ot used Not used Note on 281x devices this was the frequency toggle test This has been moved to the user option 3 The frequency toggle test is available under all operations since each operation algorithm file is a separate compile The following sections describe in detail how to use each option 9 1 Specify Which Sectors to Erase Erase User Option 1 For the erase operation User Option 1 allows you...

Page 19: ... is in a depleted state cannot be erased then try the depletion recovery algo Other conditions that can cause the CPU to halt prior to the completion of the Erase algorithm e g power loss device reset PC crash etc can result to the same problem described above Pressing STOP when executing the frequency toggle test described in section 9 3 is ok 9 1 4 Select OK and save the project File Save Projec...

Page 20: ...gnored F2802 Erase User Option 1 Examples 0001 Erase only sector A 0003 Erase only sector A and sector B 000F Erase all sectors on an F2802 device F2806 Sector Mask Value F2806 Sector Addresses Bit 0 Erase Sector A Bit 1 Erase Sector B Bit 2 Erase Sector C Bit 3 Erase Sector D Bit 5 15 ignored F2806 Erase User Option 1 Examples 0001 Erase only sector A 0003 Erase only sector A and sector B 000F Er...

Page 21: ...g the verify operation This option can be used to increase the speed of the verify operation or allow you to match the wait states used in your application if desired CAUTION Frequency limits for both the Flash and OTP blocks are documented in the device Data Manual SPRS174 Refer to the Data Manual for the minimum access time of the Flash and OTP memory Using a wait state value that is too low wil...

Page 22: ...AIT register 9 2 5 Select OK 9 2 6 Save the project File Save Project 9 3 CPU Frequency and PLL Multiplier Configuration Toggle Test User Option 3 User Option 3 turns on and off the frequency configuration toggle test This test is used to confirm that the algorithms are properly configured for the CPU frequency and PLL multiplier Refer to section 7 for information on how to configure the algorithm...

Page 23: ...n is connected to in your system will not encounter difficulty when the pin is toggling e g the device the pin is connected to should be powered down held in reset etc A number of different pins are selectable above in order to avoid such problems 9 3 4 Click Ok and save the project File Save Project 9 3 5 To begin the toggle test start a SDFlash operation using the Device Flash menu Uncheck any o...

Page 24: ...rds are in an unknown state then the device cannot be recovered If however the CSM passwords are known and the device can be unlocked then the depletion recovery algorithm can be run to try and recover the part The depletion recovery algo looks for sectors that are in depletion and attempts to recover them All sectors on the device are checked The current maximum timeout for the algorithm is appro...

Page 25: ...rithms in a directory different from the default installation directory the directory paths in the Project Settings will need to be changed 11 1 DSP Reset Fails Check that the target DSP board is properly powered Check that the DSP is properly clocked check XCLKOUT using an oscilloscope If using a stand alone JTAG emulator make sure that it is properly powered Make sure that the SDFlash Project is...

Page 26: ...nning the CPU frequency and PLL multiplier configuration toggle test described in section 9 3 CPU Frequency and PLL Multiplier Configuration Toggle Test User Option 3 SDFlash should have full control of the device That is no user application should be running no interrupts firing and CCS should be shut down prior to using SDFlash Make sure that the device has a clean VDD3VFL 3 3V voltage source In...

Page 27: ...Flash and OTP wait states Verify User Option 1 and Verify User Option 2 11 6 Programmed Application Fails To Run This section offers suggestions if you find that your programmed out file is not executing properly C281x C C Header Files and Peripheral Examples in C literature SPRC097 is available for download from the TI website and provides small example programs for each of the peripherals on the...

Page 28: ...mall assembly routine can be inserted in the code to disable the watchdog before the branch to _c_int00 The examples in C281x C C Header Files and Peripheral Examples in C literature SPRC097 illustrate how to disable the watchdog before the c initialization phase For programs with a long C initialization routine the watchdog may reset before the main function is reached and the watchdog disabled o...

Page 29: ...aused if the first address specified is outside of flash OTP or the number of words to be programmed is such that the last address will be outside of flash OTP This error can be returned by the erase and depletion recovery functions if an invalid address is used for the pre conditioning of the flash In this case check that the const section of the API is located in SARAM that can be accessed by th...

Page 30: ...d 21 STATUS_FAIL_PRECONDITION Erase operation failed because the clear portion of the pre condition operation failed 22 STATUS_FAIL_ERASE Erase operation failed because the sector could not be erased with the maximum allowed number of pulses 23 STATUS_FAIL_COMPACT Erase operation failed because the post conditioning compaction failed 24 STATUS_FAIL_PRECOMPACT This error code is new as of V2 00 of ...

Page 31: ...This is a F280x SDFlash specific error code It is issued by the SDFlash interface function not the flash API This error code indicates that the MCLKSTS bit is set within the PLLSTS register This bit indicates that the external clock has at some point gone missing When this is the case the flash API should not be executed as it will be at the wrong frequency ...

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