SPRS293A − OCTOBER 2005 − REVISED NOVEMBER 2005
7
POST OFFICE BOX 1443
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HOUSTON, TEXAS 77251−1443
device characteristics
Table 1 provides an overview of the DSP. The table shows significant features of the device, including the
capacity of on-chip RAM, the peripherals, the execution time, and the package type with pin count. For more
details on the C6000
DSP device part numbers and part numbering, see Figure 5.
Table 1. Characteristics of the C6712D Processor
HARDWARE FEATURES
INTERNAL CLOCK
SOURCE
C6712D
(FLOATING-POINT DSP)
EMIF
ECLKIN
EMIF
SYSCLK3 or ECLKIN
1
EDMA
CPU clock frequency
1
Peripherals
McBSPs
CPU/2 clock frequency
—
Peripherals
McBSPs
SYSCLK2
2
32-Bit Timers
CPU/4 clock frequency
—
32-Bit Timers
1/2 of SYSCLK2
2
GPIO Module
SYSCLK2
1
Size (Bytes)
72K
On-Chip Memory
Organization
4K-Byte (4KB) L1 Program
(L1P) Cache
4KB L1 Data (L1D) Cache
64KB Unified Mapped
RAM/Cache (L2)
CPU ID+
CPU Rev ID
Control Status Register (CSR.[31:16])
0x0203
Frequency
MHz
150
Cycle Time
ns
6.7 ns
Voltage
Core (V)
1.20†
Voltage
I/O (V)
3.3
PLL Options
CLKIN frequency multiplier
−
Clock Generator Options
Prescaler
Multiplier
Postscaler
/1, /2, /3, ..., /32
x4, x5, x6, ..., x25
/1, /2, /3, ..., /32
BGA Package
27 x 27 mm
272-Pin BGA (GDP and
ZDP)
Process Technology
µ
m
0.13
µ
m
Product Status
Product Preview (PP)
Advance Information (AI)
Production Data (PD)
PD‡
† This value is compatible with existing 1.26V designs.
‡ PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include testing of all parameters.
