When the on-board regulators are not being used and independent power supplies are being
used instead, i.e. the case of a voltage tolerance test, the on-board regulators should be disabled
to prevent the regulator’s voltage sense line from trying to regulate the voltage supplied through
the banana jack and not from its own output. This is accomplished by placing a short on the
headers (JMP108, JMP110, and JMP114) labeled “DISABLE”. The remote sense feature is not
designed to compensate for the forward drop of non-linear or frequency dependent components
that may be placed in series with the converter output. Examples include OR-ing diodes, filter
inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense
connection they are effectively placed inside the regulation control loop, which can adversely
affect the stability of the regulator. A large 0 ohm resistor has been installed at the voltage
entrance point of each power plane and can be replaced with a ferrite bead of desired. In this
situation, the 0 ohm resistors on the sense lines can be interchanged to connect the sense line
directly to its output and eliminate the additional components that could otherwise create
instability on the regulator’s output. For the 1.2V regulator, the R223 0 ohm resistor should be
removed and the R222 populated with a 0 ohm resistor. For the 1.5V or 1.8V regulator, R221
should be removed and placed on R220, and similarly R223 should be moved to R222 for the
2.5V regulator.
The VREF plane is sourced through a Voltage Divider providing half of the voltage on the 1P5/8V
plane. The VDDQ and VDDR power pins of the TLK3134 can both be operated off of either 1.5V
or 1.8V with VREF being half of whatever voltage is on the VDDQ pins. The VREF plane can be
powered through the plane monitoring header (JMP3) and removing the 0 ohm resistor (R71)
although this is not recommended. A separate VDDR plane has been added as there is no
relationship between the VDDR pin and the VDDQ pins, however, the VDDR plane is sourced
through a 0 ohm resistor (R67) from the voltage on the 1P5/8V plane that provides power the
VDDQ pins. This resistor can be replaced with a ferrite bead or removed completely and an
external supply can be connected to the VDDR Header (JMP5) in the case different voltages are
desired on the two planes.
Furthermore, for more accurate current readings the PULLUP_EN Jumpers on all control pin
headers can be removed quickly disconnecting the pullup resistors from the voltage plane.
However, the removal of the PULLUP_EN jumpers will also require manual high/low control of
the control pins.
Better Performance can be achieved when the Jitter Cleaner is enabled by using an external
power supply on the 1.2V Banana Jack. A dedicated LDO 1.2V Regulator powering the Jitter
Cleaner Power Plane should be considered for the end application.
8
TLK3134 XAUI Transceiver / 4 Channel Multi-Rate Transceiver Evaluation Module (EVM) Users’ Guide
SLLU104A - September 2007
