Control Signals
All of the external control pins on the TLK3134 EVM have been consolidated to a single location
on the board and broken out into several header blocks for easier reference. LEDs have been
added to the GPO[4:0] lines in addition to the headers for scope probes, to allow easy monitoring
of the High/Low value on the line. The LED will be ON when the line is a Logic High, and the
LED will be OFF when the line is a Logic Low.
Figure 8. Control Connectors (JMP13, JMP15, JMP20, JMP21, JMP25, JMP26)
ENABLE
SPEED1
SPEED0
PLOOP
SLOOP
JMP13
PRBS_EN
CODE
TESTEN
AMUX1
AMUX0
PULLUP_EN
JMP12
R14
R13
R12
R11
R10
R9
R8
R7
R6
R5
PRTAD4
PRTAD3
PRTAD2
PRTAD1
PRTAD0
R50
R51
R52
R53
R54
GND
PULLUP_EN
JMP24
JMP25
JMP26
R55
ST
GPI1
GPO0
GPO1
GPO2
GPO3
R39
R38
R37
R36
R35
PULLUP_EN
JMP14
JMP15
JMP21
TST_OUT
GND
JMP20
VCO_TL_TST
GND
INDUCTOR/GND
L1
THE PINS ON THIS SIDE
OF ALL HEADER
BLOCKS ARE GND
THE RESISTORS ON
THIS SIDE OF ALL
HEADER BLOCKS ARE
PULL UP RESISTORS
REMOVING THE
JUMPER ON THE
PULLUP_EN HEADERS
WILL DISCONNECT THE
PULL UP RESISTORS
FROM THE VOLTAGE
PLANE FOR MORE
ACCURATE CURRENT
MEASUREMENTS
THE VCO_TL_TST PIN
SHOULD BE TIED TO
GND. A LOCATION FOR
A SERIES INDUCTOR TO
GND HAS BEEN ADDED
SHOULD IT BECOME
NEEDED.
GPO4 HAS NOT BEEN
CONNECTED TO THIS
HEADER BLOCK BUT
RATHER TO A SMP
CONNECTOR LOCATED
ON THE BOTTOM OF
THE BOARD WITH THE
HIGH SPEED LINES.
LEDS HAVE BEEN
CONNECTED TO EACH
OF THE GP0[4:0] PINS
AND ARE LOCATED
BELOW JMP24 AND
JMP25
THE TST_OUT PIN
SHOULD BE LEFT OPEN
IN THE APPLICATION
GPO0
U3
R4
U4
U5
GPO1
GPO2
GPO3
GPO4
R15
R16
R17
R24
D1
D2
D3
D4
D5
GPO[4:0] LEDS
12
TLK3134 XAUI Transceiver / 4 Channel Multi-Rate Transceiver Evaluation Module (EVM) Users’ Guide
SLLU104A - September 2007
