background image

POR_B 

(

PGOOD

)

USB_OTGx_VBUS

NVCC_NAND   

(1.8 V, DCDC4)

NVCC_XXX, VDDA_ADC_3P3, 

VDD_PERI_3V3, VDD_2V8 

(LS1, LDO1, 3V3 switch)

NVCC_DRAM 

(1.35 V, DCDC2

)

VDD_SOC_IN 

(1.325/1.27 V, DCDC1

)

VDD_HIGH_IN 

(3.3 V , DCDC3

)

VDD_SNVS_IN           

(3 V, coin cell/DCDC6

)

T1>=0

T2>=0

T3>0

T4>0

T5>0

T6>0

T7>0

(5 V, LS2, LS3 & LS4)

VDD_SNVS_IN 

(3 V, coin cell/DCDC6

)

VDD_SOC_IN 

(1.325 V/1.27 V, DCDC1

)

VDD_HIGH_IN 

(3.3 V, DCDC3

)

NVCC_DRAM 

(1.35 V, DCDC2

)

NVCC_XXX, VDDA_ADC_3P3, 

VDD_PERI_3V3 (3.3 V), VDD_2V8 

(

LS1, LDO1, 3V3 switch

)

NVCC_NAND  

(1.8 V, DCDC4

)

USB_OTG_VBUS 1& 2 

(5 V, LS2, LS3, LS4

)

POR_B 

(

PGOOD

)

t1>0

t2>0

t3>0

t4>=0

t5>=0

t6>0

t7>0

System Overview

www.ti.com

18

TIDUEW7 – May 2020

Submit Documentation Feedback

Copyright © 2020, Texas Instruments Incorporated

Integrated Power Supply Reference Design for NXP i.MX 6ULL

2.4.2

Power Sequencing

The processor power-up sequencing is shown in

Figure 16

First the VDD_SNVS needs to turn on before

any other power supply. For our design, VDD_SNVS is powered through a coin cell connected to the CC
pin of the TPS6521815 PMIC, and the DCDC6 supply will always be the first PMIC supply rail to turn on.
Once SNVS voltage is stabilized, then VDD_HIGH_IN should turn on because VDD_HIGH_IN should be
enabled before VDD_SOC_IN for the i.MX 6ULL processor. After VDD_SOC_IN, NVCC_DRAM is turned
on for the DDR3L memory followed by 3.3 V for I/O and analog along with 2.8 V for the LCD screen. The
final supply to turn on is the 1.8-V I/O rail. Once all these voltages are enabled and within regulation, there
is a delay before PGOOD is set high. PGOOD is the PMIC output that control the power-on reset
(POR_B) input of the processor.

The processor power-down sequencing is shown in

Figure 17

, which is the reverse of the power-up

sequence.

Figure 16. Required Power-Up Sequence for i.MX 6ULL Processor

Figure 17. Required Power-Down Sequence for i.MX 6ULL Processor

Summary of Contents for TIDA-050043

Page 1: ...5 PMIC The hardware design consists of DDR3L SDRAM 512 MB 32 MB Serial NOR Flash 8 GB eMMC 5 0 iNAND SD Card interface v3 0 dual channel 100Base T Ethernet 5 channel USB hub with Type A ports micro AB USB OTG mountable LCD screen and expansion connector for additional inputs and outputs This design is intended to be used as a reference for data concentrator projects in grid communications or for a...

Page 2: ...TER SPECIFICATIONS DETAILS Processor i MX 6ULL ARM Cortex A7 Applications Processor MCIMX6Y2CVM08AB Section 2 2 1 PMIC TPS6521815 user programmable PMIC with automatic sequencing and DVFS Section 2 3 1 Memory 4 Gb DDR3L 512 MB 256 Mb QSPI NOR Flash 32 MB 8GB eMMC 5 0 SD v3 0 interface Section 2 2 2 Ethernet Dual port ethernet interface TI DP83849I PHY and 0845 2R1T E4 RJ45 jack from Bel Fuse Secti...

Page 3: ...2 0 x1 DDR3L 512MB MT41K256M16TW 107 P eMMC 8GB MTFC8GAKAJCN 4M SDIO t 4 bit ESD Protection ESD8472MU UART1 x 1 BOOT MODE SELECT 2POS BOOT MODE I P USB HUB USB2517 JZX Supervisory TPS3808G25 RESET SWITCH POR_B PMIC_ON_REQ WDOG_B PMIC_ON_REQ WDOG_B Power and Monitoring Section USB2 0 5 Port 2 2x1 Type A 1 t Type A LCD Screen USB2 0 x1 8 16 bit Parallel ETHERNET PHY DP83849I ESD Protection PUSB3F96 ...

Page 4: ... Applications Processor The main component of this design is the NXP i MX 6ULL processor It is a single core Arm Cortex A7 16 bit processor Dynamic voltage and frequency scaling DVFS is a highlight of the processor wherein the processor can change the core voltage with respect to the processing power required The multimedia performance of the processor is enhanced by a multilevel cache system an A...

Page 5: ...it Documentation Feedback Copyright 2020 Texas Instruments Incorporated Integrated Power Supply Reference Design for NXP i MX 6ULL 2 2 2 i MX 6ULL Memory Interfaces This project makes use of i MX 6ULL processor s four different external memory interfaces using 4 Gb DDR3L 512 MB 256 Mb QSPI NOR Flash 32 MB 8 GB eMMC 5 0 and SD v3 0 2 2 2 1 DDR3L i MX 6ULL has a dedicated DDR memory controller which...

Page 6: ...0SIT Serial NOR Flash memory with a density of 256 Mb 32 MB supports a clock frequency of 166 MHz for data through put up to 90 MBps at DTR with an operating voltage of 1 7 V to 2 0 V and the interface diagram of this Flash IC with the processor is shown in Figure 3 DESCRIPTION MFG PART NUMBER IC NOR Flash 32MB 133MHz SPI 1 7 2V W PDFN 8 Micron MT25QU256ABA1EW7 0SIT Figure 3 QSPI NOR Flash Interfa...

Page 7: ...nstruments Incorporated Integrated Power Supply Reference Design for NXP i MX 6ULL 2 2 2 4 SD Card Connector i MX 6ULL supports SD3 0 so in this design there is a micro SD card connector provided The power supply to the SD card is 3 3 V and the wiring for the SD Card interface is shown in Figure 5 DESCRIPTION MFG PART NUMBER Conn uSD card socket 1x1 Push Push RA SMD Wurth Elektronik Inc 6930710108...

Page 8: ...ted Integrated Power Supply Reference Design for NXP i MX 6ULL 2 2 3 USB to UART Converter There is a USB to Serial UART interface in the design To implement this feature the FT230X chip from FTDI is used which is a USB to dual port RS232 converter The detailed diagram of interconnection is shown in Figure 6 DESCRIPTION MFG PART NUMBER IC FT230X USB to UART Converter SSOP 16 FTDI Chip FT230XS IC E...

Page 9: ...20 Submit Documentation Feedback Copyright 2020 Texas Instruments Incorporated Integrated Power Supply Reference Design for NXP i MX 6ULL 2 2 4 USB Ports This design uses the processor s two USB interfaces where the primary USB OTG1 interface connects directly to the micro AB port and USB OTG2 acts as a host only connecting to a USB Hub The USB2517I is a 7 port USB hub that multiplexes the USB dat...

Page 10: ...s to select an LCD screen that is suitable for the application and compatible with the processor The Newhaven Display NHD 2 4 240320CF CTXI F backlight and LCD screen selected for this design can make use of the already available 3 3 V and 1 8 V supply voltages so we can eliminate the need for additional voltage regulators Additionally this display is compatible with the processor and exceeds the ...

Page 11: ... strip 2x5 2 54mm ST SMD Samtec TSM 105 01 T DV Figure 9 USB2ANY Header Connections to PMIC I2 C Pins 2 2 8 Functional Switches and Status LEDs There are two functional multi purpose push buttons connected to GPIOs configured as inputs on the processor that can be used for software developers to test applications developed using this board Three LED are connected to three GPIOs of the processor to...

Page 12: ...Arm Cortex processors like the i MX 6ULL from NXP The PMIC is a good fit for applications powered from a 5 V supply or a Li Ion battery The IC consists of three adjustable step down buck converters one buck boost converter one adjustable LDO regulator and three load switches with two selectable current limit The PMIC supports undervoltage lockout UVLO over temperature warning and shutdown separate...

Page 13: ...cumentation Feedback Copyright 2020 Texas Instruments Incorporated Integrated Power Supply Reference Design for NXP i MX 6ULL 2 3 2 DP83849I Dual Ethernet PHY i MX 6ULL supports two 10 100Mbps MII RMII Ethernet interfaces This design requires two 100 Base T Ethernet ports so the DP83849I Dual Ethernet PHY is used in this design This Ethernet PHY supports two RMII interface and able to work from a ...

Page 14: ... the live current information a current sense circuit is inserted in series with the power nets from the PMIC to the processor The current sensing is done with the INA3221 device There are two devices used to monitor all the TPS6521815 PMIC power rails The wiring is shown in Figure 13 The address pin A0 of the INA3221 device needs to be terminated according to Table 3 Figure 13 INA3221 Current Sen...

Page 15: ...ystem down completely a separate push button connected to the ONOFF pin of the processor is used Figure 14 Reset Scheme 2 3 5 TPS2054B TPS22964C Auxiliary Load Switches Figure 15 shows the full power architecture Each peripheral device added to a design may require additional power in addition to what is required by the processor For this design we had to add load switches TPS22964C TPS2054B for p...

Page 16: ...rial NOR Flash USB Hub 3 0 V 1 mA 1 275 V 1 325 V 500 mA 1 35 V 50 mA 3 3 V 200 mA 1 8 V 100 mA 3 3 V 150 mA 5 0 V 50 mA 5 0 V 1 A 1 35 V 241 mA 3 3V 947 mA VREF VDD_HIGH_IN VDD_HIGH_IN VDD_HIGH_IN GPIO1 GPIO1 Load Switch TPS22964C 5 0 V 2 A RT Ethernet PHY eMMC LCD Screen LCD Screen SD Card Power Mux 2 8 V 15 mA 3 3 V 200 mA 3 3 V 1 8 V 1 8 V 150 mA 3 3 V 747 mA RT System Overview www ti com 16 T...

Page 17: ...is the main power supply to the TPS6521815 device The PMIC will generate 6 different voltages 1 275 V 1 325 V with dynamic voltage scaling DVS 1 35 V 3 3 V 1 8 V 2 8 V and a 2 4 V to 3 0V always on supply for SNVS The load switches LS2 and LS3 are used to power USB slave devices with 5 0 V The estimated current consumption for each rail is listed in Table 4 Table 4 System Power Estimation VOLTAGE ...

Page 18: ... in Figure 16 First the VDD_SNVS needs to turn on before any other power supply For our design VDD_SNVS is powered through a coin cell connected to the CC pin of the TPS6521815 PMIC and the DCDC6 supply will always be the first PMIC supply rail to turn on Once SNVS voltage is stabilized then VDD_HIGH_IN should turn on because VDD_HIGH_IN should be enabled before VDD_SOC_IN for the i MX 6ULL proces...

Page 19: ...6ULL www ti com System Overview 19 TIDUEW7 May 2020 Submit Documentation Feedback Copyright 2020 Texas Instruments Incorporated Integrated Power Supply Reference Design for NXP i MX 6ULL 2 4 3 I2 C Device Chain Figure 18 shows the I2 C channel mapping from the processor to each slave device Figure 18 I2 C Device Chain 2 4 4 Clock Scheme The following is a list matching the required clock frequency...

Page 20: ...Data Of these 24 pins 4 of them are controlled by the 4 DIP Switches of SW6 All of the possible BOOT options for this design are given in Table 5 SW7 and Table 6 SW6 The connections of the DIP switches to the processor are shown in Figure 20 Figure 20 BOOT Mode and Configuration DIP Switches Table 5 SW7 BOOT Mode Settings SW7 PIN 1 SW7 PIN 2 BOOT Type BOOT_MODE 1 BOOT_MODE 0 Boot from Fuses 0 0 Se...

Page 21: ...tatus LED Conn USB2ANY Conn LCD I O Conn www ti com System Overview 21 TIDUEW7 May 2020 Submit Documentation Feedback Copyright 2020 Texas Instruments Incorporated Integrated Power Supply Reference Design for NXP i MX 6ULL 2 4 6 PCB Floor Planning Figure 21 shows the floor planning for the top side of the PCB and Figure 22 shows the floor planning for the bottom side of the PCB Figure 21 PCB Floor...

Page 22: ...7 May 2020 Submit Documentation Feedback Copyright 2020 Texas Instruments Incorporated Integrated Power Supply Reference Design for NXP i MX 6ULL 3 Getting Started Testing Setup and Test Results 3 1 Getting Started with Hardware and Software 3 1 1 Hardware This section contains information about the initial set up of the TIDA 050043 board power up options and user interfaces Figure 23 shows the to...

Page 23: ... stand offs to the board with screws inserted in the four holes at the edge of the PCB 2 Set the BOOT option using SW7 SW6 DIP switches Figure 25 and Figure 26 3 Insert CR2032 coin cell battery in the holder BH1 Figure 27 4 Insert the SD card in J2 connector if SD Card is used for BOOT Figure 28 5 Insert the USB micro B cable into J8 connector for UART debug in Terminal window Figure 29 Type A plu...

Page 24: ... for NXP i MX 6ULL Figure 25 Setting DIP Switch SW7 for BOOT Mode from Internal Memory Figure 26 Setting DIP Switch SW6 for BOOT Config from SD Card Figure 27 Inserting Coin Cell Battery Into BH1 NOTE The voltage of the coin cell battery 3 0 V nominal must be above 2 4 V for the supervisor to allow system power on If the coin cell battery voltage is too low it must be replaced with a fresh battery...

Page 25: ...20 Submit Documentation Feedback Copyright 2020 Texas Instruments Incorporated Integrated Power Supply Reference Design for NXP i MX 6ULL Figure 28 Inserting SD Card Into J2 Figure 29 Inserting micro B Cable Into J8 NOTE Refer to Section 3 1 2 for the procedure to debug TIDA 050043 through Terminal window ...

Page 26: ...mprove the user experience getting started with the TIDA 050043 reference design 1 Number shown in Figure 23 2 D7 is assigned to Port A along with J3A top port indicator LEDs and D8 is assigned to Port B along with J3B bottom port indicator LEDs Table 7 Indicator LEDs NUMBER 1 DESIGNATOR DESCRIPTION MEANING 1 D5 Power On LED ON Power On OFF Power Off 2 D4 Over voltage LED ON Input over voltage 5 2...

Page 27: ... a micro USB cable and a 5 V DC power supply The procedure for building and installing the software image is outside the scope of this document 3 1 2 1 Booting of TIDA 050043 Insert the SD card into the SD card slot provided in the board and set the boot switches to boot from SD card If executables are not found in the configured boot source then the software is automatically fetched from the SD c...

Page 28: ...corresponds to DCDC1 1 325 V root timx6y echo userspace sys devices system cpu cpu0 cpufreq scaling_governor root timx6y echo 900000 sys devices system cpu cpu0 cpufreq scaling_setspeed root timx6y echo 792000 sys devices system cpu cpu0 cpufreq scaling_setspeed To run a current sensor application and measure the current on any rail coming out of the TPS6521815 PMIC where 1 in the first prompt is ...

Page 29: ...al time Current Monitoring with LCD Screen There are many other useful functions that are written specifically for testing TIDA 050043 in addition to the thousands of pre defined Linux commands that can be included as part of the Yocto build for iMX The most useful one for stress testing the processor and increase load current to test the PMIC is stress ng More information on Linux commands can be...

Page 30: ...3 6 Related Documentation 1 Texas Instruments TPS6521815 User Programmable Power Management IC PMIC With 6 DC DC Converters 1 LDO and 3 Load Switches Data Sheet 2 Texas Instruments Powering the NXP i MX 6ULL 6UltraLite with the TPS6521815 PMIC Tech Note 3 Evaluation Kit based on i MX 6ULL Quick Start Guide 4 Ubuntu Manpage Repository 5 Yocto Project home page 6 1 Trademarks TI E2E is a trademark o...

Page 31: ...se resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for...

Reviews: