Texas Instruments OMAP36 Series, Technical Reference Manual, Page: 611 / 3738

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PRCM Register Manual
Bits Field Name Description Type Reset
31:2 RESERVED Write 0s for future compatibility. Read returns 0. R 0x00000000
1:0 LASTPOWERSTATEENTERED Last power state entered RW 0x0
0x0: CAM domain was previously OFF
0x1: CAM domain was previously in RETENTION
0x2: CAM domain was previously INACTIVE
0x3: CAM domain was previously ON
Table 3-413. Register Call Summary for Register PM_PREPWSTST_CAM
PRCM Basic Programming Model
• PM_PREPWSTST_ <domain_name> (Previous Power State Status Register) : [0]
PRCM Register Manual
• CAM_PRM Registers : [1]
3.8.2.11 PER_PRM Registers
3.8.2.11.1 PER_PRM Register Summary
Table 3-414. PER_PRM Register Summary
Register Name Type Register Width Address Offset Physical Address Reset Type
(Bits)
RM_RSTST_PER RW 32 0x0000 0058 0x4830 7058 C
PM_WKEN_PER RW 32 0x0000 00A0 0x4830 70A0 W
PM_MPUGRPSEL_PER RW 32 0x0000 00A4 0x4830 70A4 W
PM_IVA2GRPSEL_PER RW 32 0x0000 00A8 0x4830 70A8 W
PM_WKST_PER RW 32 0x0000 00B0 0x4830 70B0 C
PM_WKDEP_PER RW 32 0x0000 00C8 0x4830 70C8 W
PM_PWSTCTRL_PER RW 32 0x0000 00E0 0x4830 70E0 W
PM_PWSTST_PER R 32 0x0000 00E4 0x4830 70E4 C
PM_PREPWSTST_PER RW 32 0x0000 00E8 0x4830 70E8 C
3.8.2.11.2 PER_PRM Registers
Table 3-415. RM_RSTST_PER
Address Offset 0x0000 0058
Physical Address 0x4830 7058 Instance PER_PRM
Description This register logs the different reset sources of the PERIPHERAL domain. Each bit is set upon release
of the domain reset signal. Must be cleared by software.
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED
GLOBALCOLD_RST
DOMAINWKUP_RST
GLOBALWARM_RST
COREDOMAINWKUP_RST
611 SWPU177N – December 2009 – Revised November 2010 Power, Reset, and Clock Management
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