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PRCM Register Manual
Bits
Field Name
Description
Type
Reset
1
EN_MCBSP3
McBSP3 Wake-up status
RW
0x0
Read 0x0: McBSP 3 wake-up did not occur or was
masked.
Write 0x0: Status bit unchanged
Read 0x1: McBSP 3 wake-up occurred.
Write 0x1: Status bit is cleared to 0.
0
EN_MCBSP2
McBSP 2 Wake-up status
RW
0x0
Read 0x0: McBSP 2 wake-up did not occur or was
masked.
Write 0x0: Status bit unchanged
Read 0x1: McBSP 2 wake-up occurred.
Write 0x1: Status bit is cleared to 0.
Table 3-424. Register Call Summary for Register PM_WKST_PER
PRCM Basic Programming Model
•
PM_WKST_ <domain_name> (Wake-Up Status Register)
PRCM Register Manual
•
Table 3-425. PM_WKDEP_PER
Address Offset
0x0000 00C8
Physical Address
0x4830 70C8
Instance
PER_PRM
Description
This register allows enabling or disabling the wake-up of the PER domain upon another domain wakeup
events.
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
EN_IVA2
EN_MPU
EN_CORE
EN_WKUP
RESERVED
Bits
Field Name
Description
Type
Reset
31:5
RESERVED
Write 0s for future compatibility. Read returns 0.
R
0x0000000
4
EN_WKUP
WAKEUP domain dependency
RW
0x1
0x0: PER domain is independent of WKUP domain
wake-up event.
0x1: PER domain is woken-up upon WKUP domain
wake-up event.
3
RESERVED
Write 0s for future compatibility. Read returns 0.
R
0x0
2
EN_IVA2
IVA2 domain dependency
RW
0x1
0x0: PER domain is independent of IVA2 domain
wake-up event.
0x1: PER domain is woken-up upon IVA2 domain
wake-up event.
1
EN_MPU
MPU domain dependency
RW
0x1
0x0: PER domain is independent of MPU domain
wake-up event.
0x1: PER domain is is woken-up upon MPU domain
wake-up event.
621
SWPU177N – December 2009 – Revised November 2010
Power, Reset, and Clock Management
Copyright © 2009–2010, Texas Instruments Incorporated