Texas Instruments OMAP36 Series, Technical Reference Manual

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McSPI Register Manual
Bits Field Name Description Type Reset
0x1: Interface clock is maintained. Functional clock may be
switched off.
0x2: Functional clock is maintained. Interface clock may be
switched off.
0x3: Interface and Functional clocks are maintained.
7:5 Reserved Reads returns 0 RW 0x0
4:3 SIDLEMODE Power management RW 0x0
0x0: If an idle request is detected, the McSPI acknowledges
it unconditionally and goes in Inactive mode. Interrupt,
DMA requests and wake up lines are unconditionally
de-asserted and the module wake-up capability is
deactivated even if the bit
MCSPI_SYSCONFIG [
ENAWAKEUP] is set.
0x1: If an idle request is detected, the request is ignored and
the module does not switch to wake up mode and
keeps on behaving normally.
0x2: If an idle request is detected, the module will switch to
wake up mode based on its internal activity and the
wake up capability can be used if the bit
MCSPI_SYSCONFIG [ENAWAKEUP] is set.
0x3: Reserved - do not use.
2 ENAWAKEUP Wake-up feature control RW 0
0x0: Wake-up capability disabled
0x1: Wake-up capability enabled
1 SOFTRESET Software reset. Read always returns 0. RW 0
0x0: Normal mode.
0x1: Trigger a module reset. This bit is automatically reset by
hardware.
0 AUTOIDLE Internal interface Clock gating strategy RW 0
0x0: interface clock is free-running
0x1: Automatic interface clock gating strategy is applied,
based on the module interface activity
Table 20-23. Register Call Summary for Register MCSPI_SYSCONFIG
McSPI Integration
• Software Reset : [0] [1]
McSPI Functional Description
• Normal Mode : [2]
• Idle Mode : [3] [4] [5] [6]
McSPI Basic Programming Model
• McSPI Configuration and Operations Example : [7]
McSPI Register Manual
• McSPI Register Summary : [8]
• McSPI Register Description : [9] [10]
3035 SWPU177N – December 2009 – Revised November 2010 Multichannel SPI
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