Texas Instruments OMAP36 Series, Technical Reference Manual

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Display Subsystem Functional Description
Table 7-32. HS to LP Timing Parameters
Timing Description Register
If EoT is enabled, a delay is added to
EXIT_HS_MODE_LATENCY to send the EoT packet. The EoT
T
HS-EOT
period depends on the number of data lanes, and is expressed
with the following formula:
THS-EOT = DIVROUNDUP (4, NB_DATA_LANES).
Thus:
1 data lane = 4 DDR clocks
2 data lanes = 2 DDR clocks
Time to drive flipped differential state after last payload data bit DSI_PHY_REGISTER0 [15:8]
T
HS-TRAIL
of a HS transmission burst REG_THSTRAIL
DSI_PHY_REGISTER0 [7:0]
T
HS-EXIT
Time to drive data lane to LP-11 state, after HS burst
REG_THSEXIT
Time that the transmitter must continue sending HS clock after
T
CLK-POST
the last associated data lane has transitioned to LP mode
Time to drive HS differential state after last payload clock bit of a DSI_PHY_REGISTER1 [15:8]
T
CLK-TRAIL
HS transmission burst REG_TCLKTRAIL
Time between the data lane request deassertion and the CLK
request deassertion to switch the data lanes into LP mode. The
DSI_CLK_TIMING [7:0]
DDR_CLK_POST
DDR_CLK_POST value must follow the rule: DDR_CLK_POST DDR_CLK_POST
≥ T
HS-TRAIL
+ T
HS-EOT
+ T
CLK-POST
Time to exit in HS mode. It is critical that
DSI_VM_TIMING7 [15:0]
EXIT_HS_MODE_LATENCY
(1)
EXIT_HS_MODE_LATENCY = DIVROUNDUP((T
HS-TRAIL
+
EXIT_HS_MODE_LATENCY
T
HS-EXIT
),4) + 1 + T
HS-EOT
(2)
(1)
The formula for EXIT_HS_MODE_LATENCY timing is relevant only in video mode. It does not need to be programmed in
command mode.
(2)
The formula DIVROUNDUP(value, div) is equivalent to ROUNDUP(value/div).
7.4.3.2.3 Extra LP Transitions
Some DSI receivers require extra clock cycles in LP mode to process the data. The DSI protocol engine
can be programmed to send automatically one NULL long packet. It applies only when no more data are
ready to be sent from the internal FIFO to the peripheral on the last low speed transfer. The same value is
used for all the VCs sending packets in low speed mode.
The size of the payload is defined by the DSS. DSI_CLK_CTRL [17:16] LP_CLK_NULL_PACKET_SIZE bit
field. The header value depends on the VC ID and the size of the payload as detailed in Table 7-33 and
Table 7-34 .
Table 7-33. Extra NULL Packet Header
Virtual Payload size Header Header (2nd Byte): WC Header (3rd Byte): WC Header (ECC)
Channel ID ( DSI_CLK_CTRL [17:16] (1st Byte) LSB MSB
LP_CLK_NULL_PACKE
T_SIZE)
0 0x0 0x9
0x0 1 0x9 0x1 0x13
2 0x2 0x2F
3 0x3 0x35
0 0x0 0x1F
0x1 1 0x49 0x1 0x05
2 0x2 0x39
3 0x3 0x0 0x23
0 0x0 0x10
0x2 1 0x89 0x1 0x0A
2 0x2 0x36
3 0x3 0x2C
1663 SWPU177N – December 2009 – Revised November 2010 Display Subsystem
Copyright © 2009–2010, Texas Instruments Incorporated