Texas Instruments LM5064EVK, User Manual, Page: 16 / 28

V
TIMER
(2V/Div)
V
OUT
(20V/Div)
V
SYS
(20V/Div) (-48V)
V
GATE
(20V/Div)
V
GATE
(20V/Div)
V
OUT
(25V/Div)
V
SYS
(25V/Div)
V
TIMER
(2V/Div)
V
OUT
(20V/Div)
V
GATE
(5V/Div)
I
IN
(5A/Div)
V
TIMER
(2V/Div)
V
OUT
(20V/Div)
V
GATE
(5V/Div)
I
IN
(5A/Div)
CL = 8.7A
CB = 1.8 x CL
V
TIMER
(2V/Div)
V
OUT
(20V/Div)
V
SYS
(5V/Div)
I
IN
(5A/Div)
V
TIMER
(2V/Div)
V
OUT
(20V/Div)
V
SYS
(20V/Div)
I
IN
(5A/Div)
Performance Characteristics
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16 SNVA481B – October 2011 – Revised January 2020
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AN-2143 LM5064 Evaluation Kit
LM5064 is conneced to the VEE plane.
5. All testpoint signals are referenced to the VEE voltage.
17 Performance Characteristics
Figure 15. Insertion Time Delay (40 ms/div)
Figure 16. Turn-On Sequence into a 40 Ω Load (40 ms/div)
Figure 17. Circuit Breaker Event (CL = VDD) 4 ms/div
Figure 18. Current Limit Event (CL = VDD) 4 ms/div
Figure 19. Startup (UVLO/EN, OVLO) (400 ms/div)
Figure 20. Short Circuit V
OUT
1 s/div