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Copyright © 2017, Texas Instruments Incorporated
Board Setup Examples
33
SLAU711 – March 2017
Copyright © 2017, Texas Instruments Incorporated
HSDC Pro With Xilinx
®
KCU105
9.
In HSDC Pro, press on the
DAC
tab, and select "DAX38RF8X_LMF_841" from the drop-down menu.
10. Enter "491.52" as the
Data Rate (SPS)
and change
DAC Option
to "2’s Complement". Make sure the
number of samples is set to at least 8192, but no more than 32,768.
11. Set the following in the
I/Q Multitone Generator
:
(a)
Tone BW
– "1"
(b)
#
of Tones – "1"
(c)
Tone Center
– "0" (This will change to the closest value possible to DC.)
(d)
Tone selection
– "Complex"
is a screenshot of a proper configuration on HSDC Pro.
Figure 32. HSDC Pro Configuration for PLL Mode
12. Click the
Create Tones
button and press
Send
.
13. The new lane rate (4.915 GHz) and FPGA Clock (122.88 MHz) settings should be shown.