Backplane Setup
2-30
Figure 2–24. Connector Premate (Left), Mating (Center), and Mated (Right)
Key
Figure 2–25 (left) shows the clock card properly inserted, with the CDC
components and the clock crystal facing away from the backplane connectors
and daughter cards. Yellow dots are located on the connector and the card to
help ensure proper orientation. Figure 2–25 (right) shows the card
improperly inserted.
Figure 2–25. Clock Card Properly (Left) and Improperly (Right) Inserted
Match
Dots
Summary of Contents for GTLP
Page 1: ...June 2001 Standard Linear Logic GTLP Evaluation Module EVM User s Guide ...
Page 2: ...Printed in U S A 0601 SCEA023 ...
Page 3: ...GTLP Evaluation Module EVM User s Guide SCEA023 June 2001 Printed on Recycled Paper ...
Page 12: ...Tables x ...
Page 26: ...Connectors 2 10 Figure 2 7 AMP Single Line Model Data Sheet ...
Page 65: ...Monitored Waveforms 4 8 ...
Page 71: ...Damage to the Daughter Cards 5 6 ...
Page 79: ...Board Layouts and Schematics A 8 Figure A 4 Backplane Schematic ...
Page 81: ...Board Layouts and Schematics A 10 Figure A 6 Driver Card Schematic ...