Texas Instruments Errata MSP430FG6426, Manual

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RTC16 RTC Module
Category
Functional
Function RTC_B module can seem stuck or function abnormally (jumping RTC)
Description If VBAT and DVCC (VPRIM) power up slowly and cross around the VBAK switching
threshold, internal functions may not reset properly.
This can lead to a stuck RTC_B module or to unexpected functionality e.g. RTC_B is
running faster which causes the observed time value to jump or skip forward.
Workaround Prevent DVCC (VPRIM) and VBAT from crossing each other below 2V during power up. It
does not matter which signal comes up first.
TB25 TB Module
Category Functional
Function In up mode, TBxCCRn value is immediately transferred to TBxCLn when
TBxCCTLn.CLLD bits are set or 0x01 or 0x10
Description IF Timer B is configured for Up mode,
AND
the compare latch load event (TBxCCTLn.CLLD bits) setting is configured to update
TBxCCRn when TBxR reaches 0,
THEN
TBxCCRn will update immediately instead of the described condition.
This is contrary to the user guide description of TBxCCTLn.CLLD = 0x01 or 0x10 modes.
Workaround If user needs to update TBxCCRn value when TBxR counts to 0 in Timer B up mode:
1. Set TBxCCTLn. CLLD = 0x00
2. Enable the Timer B interrupt (TBIE) in TBxCTL
3. Update TBxCCRn value within interrupt routine.
Timer B Interrupt would need to be serviced in a timely manner to mitigate disruption or
unintended timer output if an output mode is used.
UCS11 UCS Module
Category
Functional
Function Modifying UCSCTL4 clock control register triggers an additional erroneous clock request
Description Changing the SELM/SELS/SELA bits in the UCSCTL4 register will correctly configure the
respective clock to use the intended clock source but might also erroneously set XT1/XT2
fault flag if the crystals are not present at XT1/XT2 or not configured in the application
firmware. If the NMI interrupt for the OFIFG is enabled, an unintentional NMI interrupt will
be triggered and needs to be handled.
Note
The XT1/XT2 fault flag can be set regardless of which SELM/SELS/SELA bit
combinations are being changed.
Workaround Clear all the fault flags in UCSCTL7 register once after changing any of the SELM/SELS/
SELA bits in the UCSCTL4 register.
If OFIFG-NMI is enabled during clock switching, disable OFIFG-NMI interrupt during
Advisory Descriptions www.ti.com
18 MSP430FG6426 Microcontroller SLAZ669P – MAY 2015 – REVISED AUGUST 2021
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