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DAC5
(continued)
DAC Module
Description
When the DAC output has multiple pin output options, switching events on unused
alternate pin output options, such as GPIO output voltage level transitions and pulses or
input signals that pass GPIO high or low thresholds, dynamically affect the output voltage
level of the DAC output in use. This effect only lasts for a short period after the switching
event.
Workaround
If the dynamic voltage level effect on the chosen DAC output cannot be tolerated, see the
workarounds below:
A. Avoid high to low or low to high transitions on the alternate DAC output pin when
selected DAC output pin is active. Keep alternate pin pulled high or low when DAC is in
use.
B. Do not use pin featuring alternative DAC output, and keep in an output low state.
DMA4
DMA Module
Category
Functional
Function
Corrupted write access to 20-bit DMA registers
Description
When a 20-bit wide write to a DMA address register (DMAxSA or DMAxDA) is interrupted
by a DMA transfer, the register contents may be unpredictable.
Workaround
1. Design the application to guarantee that no DMA access interrupts 20-bit wide
accesses to the DMA address registers.
OR
2. When accessing the DMA address registers, enable the Read Modify Write disable bit
(DMARMWDIS = 1) or temporarily disable all active DMA channels (DMAEN = 0).
OR
3. Use word access for accessing the DMA address registers. Note that this limits the
values that can be written to the address registers to 16-bit values (lower 64K of Flash).
DMA7
DMA Module
Category
Functional
Function
DMA request may cause the loss of interrupts
Description
If a DMA request starts executing during the time when a module register containing an
interrupt flags is accessed with a read-modify-write instruction, a newly arriving interrupt
from the same module can get lost. An interrupt flag set prior to DMA execution would not
be affected and remain set.
Workaround
1. Use a read of Interrupt Vector registers to clear interrupt flags and do not use read-
modify-write instruction.
OR
2. Disable all DMA channels during read-modify-write instruction of specific module
registers containing interrupts flags while these interrupts are activated.
Advisory Descriptions
10
MSP430FG6426 Microcontroller
SLAZ669P – MAY 2015 – REVISED AUGUST 2021
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