DACx3202 12-Bit and 10-Bit, Dual, Voltage and Current Output Smart DACs With
Auto-Detected I
2
C, PMBus™, or SPI Interface
1 Features
• Programmable voltage or current outputs with
flexible configuration:
– Voltage outputs:
• 1 LSB INL and DNL (10-bit and 8-bit)
• Gains of 1x, 1.5x, 2x, 3x, and 4x
– Current outputs:
• 1 LSB INL and DNL (8-bit)
• ±25 μA, ±50 μA, ±125 μA, ±250 μA output
range options
• Programmable comparator mode for all channels
• High-impedance output when VDD is off
• High-impedance and resistive pulldown power-
down modes
• 50-MHz SPI-compatible interface
• Automatically detected I
2
C, PMBus
™
, or SPI
interface
– 1.62-V V
IH
with V
DD
= 5.5 V
• General-purpose input/output (GPIO) configurable
as multiple functions
• Predefined waveform generation: sine, cosine,
triangular, sawtooth
• User-programmable nonvolatile memory (NVM)
• Internal, external, or power-supply as reference
• Wide operating range:
– Power supply: 1.8 V to 5.5 V
– Temperature: –40˚C to +125˚C
• Tiny package: 16-pin WQFN (3 mm × 3 mm)
2 Applications
•
•
•
•
•
3 Description
The 12-bit DAC63202 and 10-bit DAC53202
(DACx3202) are a pin-compatible family of dual-
channel, buffered, voltage-output and current-output
smart digital-to-analog converters (DACs). The
DACx3202 devices support Hi-Z power-down mode
and Hi-Z output during power-off conditions. The
DAC outputs provide a force-sense option for
use as a programmable comparator and current
sink. The multifunction GPIO, function generation,
and NVM enable these smart DACs for
processor-
less
applications and design reuse. These devices
automatically detect I
2
C, PMBus, and SPI interfaces
and contain an internal reference.
The feature set combined with the tiny package and
low power make these smart DACs an excellent
choice for applications such as voltage margining and
scaling, dc set-point for biasing and calibration, and
waveform generation.
Device Information
PART NUMBER
BODY SIZE (NOM)
DACx3202
WQFN (16)
3.00 mm x 3.00 mm
(1)
For all available packages, see the orderable addendum at
the end of the data sheet.
SMPS / LDO
R
1
R
2
V
FB
SENSE
PH
GND
V
OUT
IN
BOOT
C
L
C
B
L
DACx3202
VDD
V
IN
VOUT/
IOUT
VOUT/
IOUT
DAC
REG
DAC
BUF
DAC
REG
DAC
BUF
NVM
Internal
Reference
LDO
Output Configuration
Logic
VREF
CAP
AGND
Digital Inter
face
SCL/SYNC
SDA/SCLK
A0/SDI
PROTECT
R
3
R
3
1.5
μ
F
0.1
μ
10 k
Ω
Power-supply: 0
Power-supply: 1
Voltage Margining and Scaling Using the DACx3202
SLASF47 – MAY 2022
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
