Texas Instruments Boomer LM49360, User Manual

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Bits Field Description
4 LDO4_OVR If set, the LDO 4 output is enabled when OVR is set.
5 LDO5_OVR If set, the LDO 5 output is enabled when OVR is set.
6 LDO6_OVR If set, the LDO 6 output is enabled when OVR is set.
7 LDO7_OVR If set, the LDO 7 output is enabled when OVR is set.
TABLE 22. SUBOVR
Bank 0: CONFIG = Z (0x1Eh)
Bank 1: CONFIG = H (0x2Eh)
Bits Field Description
2:0 RESERVED Reserved bits, this bit field must remain at 000b.
RESERVED Function of RESET_N Pin
000 RESET_N (Default)
001 RESET
010 TSDL or UVLO
011 TSDL or UVLO
100 TSDH or TSDL
101 TSDH or TSDL
110 0
111 1
3 BK1_SUBOVR
If set, the Buck1 output enables when SUBOVR is set
(i.e. PS_HOLD in a subPMU mode).
4 LDO1_SUBOVR
If set, the LDO1 output enables when SUBOVR is set
(i.e. PS_HOLD in a subPMU mode).
5 LDO4_SUBOVR
If set, the LDO4 output enables when SUBOVR is set
(i.e. PS_HOLD in a subPMU mode).
6 LDO5_SUBOVR
If set, the LDO5 output enables when SUBOVR is set
(i.e. PS_HOLD in a subPMU mode).
7 LDO7_SUBOVR
If set, the LDO7 output enables when SUBOVR is set
(i.e. PS_HOLD in a subPMU mode).
TABLE 23. I 2 C1 (0x40h)
Bits Field Description
2:0 PMU_H_I 2 C_ADDR The I 2 C Address for the Power Management CONFIG “H”
PMU_H_I 2 C
_ADDR
I 2 C_ADDR
000 1111111
001 1111110
010 1111101
011 1111100
100 1111011
101 1111010
110 1111001
111 1111000
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LM49360