Texas Instruments Boomer LM49360, User Manual

Page: 59 / 137

PMU Sleep
The SLEEP state(s) can be enabled and disabled for each of the voltage outputs independently in the I 2 C register SLEEP (0x02h).
PMU Under Voltage Lock Out (UVLO)
The PMU registers that support the UVLO are listed in the table below. See individual register descriptions for the details.
I 2 C Register
Name
I 2 C Register
Address
Bit # Bit Name
FLAGS 2 0x04h 5 UVLO_EVENT
BYPASS 0x05h 7 UVLO_MASK
THRES
CONFIG = Z
(0x1Bh)
[3:0]
UVLO voltage
selection
CONFIG = H
(0x2Bh)
CONFIG = L
(0x3Bh)
SUBOVR
CONFIG = Z
(0x1Eh)
[2:0]
RESET_MODE.
Allows UVLO or
UVLO to be output
onto RESET_N
CONFIG = H
(0x2Eh)
PMU Thermal Shutdown (TSD)
The PMU registers that support the TSD are listed in the table below. See individual register descriptions for the details.
I 2 C Register
Name
I 2 C Register
Address
Bit # Bit Name
FLAGS 2 0x04h
0 TSDH
1 TSDL
SUBOVR
CONFIG = Z
(0x1Eh)
[2:0]
RESET_MODE.
Allows TSDL,
TSDH, TSDL or
TSDH to be output
onto RESET_N
CONFIG = H
(0x2Eh)
Power Savings
The PMU registers that support the power savings are listed in the table below. See individual register descriptions for the details.
The power saving features are under software control, the setting and clearing of these bits are not control by hardware.
I 2 C Register
Name
I 2 C Register
Address
Bit # Bit Name
BK1_FPWM 0x5Ah 7 FORCE_PWM
BK2_FPWM 0x5Eh 7 FORCE_PWM
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LM49360