Texas Instruments ADSDeSer-50EVM, User Manual, Page: 13 / 25

I/O Connectors
2-2
2.1 I/O Connectors
The positions and functions of the ADSDeSer-50EVM connectors are dis-
cussed in the following sections.
Figure 2−1.
ADSDeSer-50EVM Overview
JTAG BYPAS S
PIN S
PROG RAM
PUSHBUTTON
INP
U
T
C ONFIGURATIO N
PINS
FPG A RESET
PUSHBUTTON
2.1.1 Input
The input connector (Con1) is used to connect one of the ADS527xEVM LVDS
output converter boards to the DeSer-50EVM.
2.1.2 JTAG
J10 is the JTAG port. This connection is used to program the onboard PROM
and access the FPGA directly by using J11 and J12.