Texas Instruments ADS7042EVM-PDK, User Manual

Page: 9 / 29

EVM_ID_SDA
EVM_ID_SCL
EVM_REG_5V5
EVM_ID_PWR
SDO_A
SCLK_AB
AGND
AGND
AGND
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
54
56
56
58
58
60
60
GND
MP1
GND
MP2
GND
MP3
GND
MP4
J4
QTH-030-01-L-D-A
EVM_ID_WP
CS_B
SDO_B
CS_A
AGND
1 2
3 4
5 6
7 8
9 10
JP5
TSW-105-07-G-D
0
R13
EVM_DVDD EVM_CAP
Figure 2-7. Digital Communication and PHI Connector on the ADS704X-5XEVM
2.4 I
2
C Bus for Onboard EEPROM
The circuit shown in Figure 2-8 is used with the PHI board to identify the specific ADCs populated on the
EVM and enable the correct GUI settings. The user does not need to modify or interact with this circuit during
EVM operation. As a result, switch S1 is set by default to enable the EEPROM write protect and must not be
altered unless the ADC is modified as per
Section 2.1.1 or Section 2.1.2 . Update the EEPROM when the ADC is
replaced using the ADS704X-5XEVM GUI, as per Section 4.6 .
EVM_ID_SDA
EVM_ID_SCL
WP
EVM_ID_PWR EVM_ID_PWR
AGND
AGND
AGND
A0
1
A1
2
A2
3
VSS
4
SDA
5
SCL
6
WP
7
VCC
8
U4
BR24G32FVT-3AGE2
2
1
3
S1
CAS-120TA
0 R10
DNP
EVM_ID_WP
10.0k
R26
10.0k
R28
100nF
C22
Figure 2-8. EEPROM Circuit on the ADS704X-5XEVM
www.ti.com Introduction to the ADS704X-5XEVM
SBAU382 – NOVEMBER 2021
Submit Document Feedback
ADS7042EVM-PDK, ADS7049-Q1EVM-PDK, and ADS7057EVM-PDK
Evaluation Module
9
Copyright © 2021 Texas Instruments Incorporated