Texas Instruments ADS7042EVM-PDK, User Manual

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Signals connected to the single-ended input path are applied to an inverting amplifier whose common-mode
voltage is set by VBIAS. The output of the amplifier connects to an RC filter (R14, R38, and C11) that then
connects to the ADC input. A compensation capacitor can be added to the amplifier feedback loop via C12, but
is not required for good performance. The amplifier power supplies are connected by default to the OPA_VDD
and OPA_VSS supplies.
Section 2.2 explains how to modify the EVM to use external supplies. If desired, the
amplifier can be bypassed by populating R37 with a 0-Ω resistor and removing R14 and R35.
Figure 2-2 also depicts all connections to the ADC (U3). Each power-supply connection has a 1-μF decoupling
capacitor. The supply connections also have a series 0-Ω resistor that can be removed for the purpose
of making external current measurements. Moreover, each digital input has a 49.9-Ω series resistor. These
resistors smooth the edges of the digital signals to minimize overshoot and ringing.
Finally, Figure 2-2 identifies a do-not-populate (DNP) component in U8. This ADC footprint is on the bottom
of the board and can be used to evaluate any single-ended ADC in an X2QFN package listed in Table 1-2 .
However, ensure that any device in U3 is cleanly removed before soldering a device in U8. Section 4.6 explains
how to use the ADS704X-5XEVM GUI to update the EEPROM when the ADC is replaced.
2.1.2 Differential Input Path
The differential input path consists of a differential driver amplifier, an RC circuit, and two ADC footprints. Figure
2-3 shows the differential input path schematic.
AGND
VBIAS
49.9 R15
49.9 R17
49.9 R16 SDO_B
SCLK_AB
CS_B
V+
8
V-
4
OPA2836QDGKRQ1
U7C
AGND
16.0
R25
16.0
R27
300pF
C17
1.00k
R23
1.00k
R24
1.00k
R29
1.00k
R30
AGND
OPA_VSS
EVM_DVDD
AGND
0
R22
0
R21
AGND
AVDD
JP3
OPA_VDD
AGND
JP2
AGND
U5_AVDD
U5_DVDD
U5_SCLK
U5_SDO
U5_CS
U5_AINP
U5_AINM
AGND
U5_AVDD
U5_DVDD
U5_SCLK
U5_SDO
U5_CS
U5_AINP
U5_AINM
5
6
7
B
OPA2836QDGKRQ1
U7B
2
3
1
A
OPA2836QDGKRQ1
U7A
AVDD
7
DVDD
1
CS
4
AINM
5
AINP
6
SCLK
2
SDO
3
GND
8
ADS7044IDCUR
U9
DNP
CS
1
SDO
2
SCLK
3
DVDD
4
GND
5
AVDD
6
AINP
7
AINM
8
ADS7057IRUGR
U5
1
2 3 4 5
J2
1
2 3 4 5
J3
100nF
C13
1µF
C15
1µF
C16
Replace R43 and R44 with 100nF
capacitors when OPA_VSS ≠ AGND
0
R44
100nF C23
DNP
100nF C24
DNP
Figure 2-3. Differential Input Path on the ADS704X-5XEVM
Signals connected to the differential input path are applied to a differential amplifier in an inverting configuration
whose common-mode voltage is set by VBIAS. The output of the amplifier connects to an RC filter (R25, R27,
and C17) that then connects to the ADC input. Each amplifier feedback loop has an option for a compensation
capacitor via C23 or C24, but these capacitors are not required for good performance. The amplifier power
supplies are connected by default to the OPA_VDD and OPA_VSS supplies.
Section 2.2 explains how to modify
the EVM to use external supplies.
Figure 2-3 also shows all connections to the ADC (U5). Each power-supply connection has a 1-μF decoupling
capacitor. The supply connections also have a series 0-Ω resistor that can be removed for the purpose
of making external current measurements. Moreover, each digital input has a 49.9-Ω series resistor. These
resistors smooth the edges of the digital signals to minimize overshoot and ringing.
Introduction to the ADS704X-5XEVM www.ti.com
6 ADS7042EVM-PDK, ADS7049-Q1EVM-PDK, and ADS7057EVM-PDK
Evaluation Module SBAU382 – NOVEMBER 2021
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