Texas Instruments ADS7042EVM-PDK, User Manual

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Finally, Figure 2-3 identifies a do-not-populate (DNP) component in U9. This ADC footprint is on the bottom of
the board and can be used to evaluate any differential ADC in a VSSOP package in Table 1-2 . However, ensure
that any device in U5 is cleanly removed before soldering a device in U9. Section 4.6 explains how to use the
ADS704X-5XEVM GUI to update the EEPROM when the ADC is replaced.
2.2 Power Supplies
The default state of the EVM has all power supplies derived from the USB power and delivered by the PHI
controller. The 3.3-V ADC digital supply voltage (DVDD) is provided by the PHI via pin 50 on J4 (see
Figure
2-7 ). The PHI also provides a regulated 5.5-V power rail that feeds into two LDOs on the EVM. These LDOs
generate a low-noise, 3.6-V (nominal) supply voltage for the amplifier (OPA_VDD) and a low-noise, 3.3-V
(nominal) analog supply voltage for the ADC (AVDD).
Figure 2-4 shows the two LDO circuits used on the
ADS704X-5XEVM.
OPA_VDD
100k
R7
100k
R9
AVDD
AGND
EVM_REG_5V5
0
R2
0
R8
0
R1
0
R6
IN
1
EN
3
BYPASS
4
FB
5
OUT
6
2
GND
TPS79101DBVR
U1
IN
1
EN
3
BYPASS
4
FB
5
OUT
6
2
GND
TPS79101DBVR
U2
15pF
C19
15pF
C5
51.1k
R33
30.1k
R34
30.1k
R32
59.0k
R31
10V
10uF
C7
10V
10uF
C20
0
R39
DNP
10nF
C18
10nF
C21
1µF
C4
1µF
C6
100k
R5
301k
R3
AVDD/4
AGND
AVDD/2
Figure 2-4. Power Tree on the ADS704X-5XEVM
In Figure 2-4 , the top LDO (U1) has an adjustable output set by resistors R31 and R32 while the bottom
LDO (U2) has an adjustable output set by resistors R33 and R34. Modify these resistor values if a different
OPA_VDD or AVDD voltage is desired. Ensure that the input, absolute, and common-mode voltage limitations
for all components are within data sheet limits when modifying the power supplies. See the LDO data sheet for
more information on how to choose resistor values for a specific output voltage.
If external power supplies are desired, remove resistors R1 and R6 in Figure 2-4 to disconnect both LDOs from
the power-supply circuit. Connector JP4 in Figure 2-5 can then be used to provide direct power to OPA_VDD,
AVDD, and OPA_VSS.
1
2
3
JP4
0
R4
OPA_VDD
AGND
OPA_VSS
AVDD
Figure 2-5. External Power-Supply Header on the ADS704X-5XEVM
If OPA_VSS is connected to any voltage other than AGND, remove R4 in Figure 2-5 and replace R43 and R44
per the instructions in Figure 2-2 . Another important consideration if OPA_VSS is modified is that the V– input
(pin 4) on the buffer amplifier in Figure 2-6 is hard-wired to AGND and is therefore unaffected when the voltage
on OPA_VSS is changed.
www.ti.com Introduction to the ADS704X-5XEVM
SBAU382 – NOVEMBER 2021
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ADS7042EVM-PDK, ADS7049-Q1EVM-PDK, and ADS7057EVM-PDK
Evaluation Module
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