TPMC917 User Manual Issue 1.0.7
Page 19 of 26
5 Configuration Hints
5.1 PCI Interrupt Control/Status
The UART and battery status generate interrupts on pin INTA# of the PCI bus. The interrupt status
can be read at the Interrupt Status Register INTCSR of the PCI Controller PCI9030.
Bit
Description
Access
Reset Value
31:8
Not used
R
0
7
Software Interrupt
R/W
0
6
PCI Interrupt Enable
R/W
1
5
Battery Interrupt Status
R
0
4
Local Interrupt 2 Polarity
R/W
1
3
Local Interrupt 2 Enable
R/W
1
2
UART Interrupt Status
R
0
1
Local Interrupt 1 Polarity
R/W
1
0
Local Interrupt 1 Enable
R/W
1 (TPMC917-10)
0 (TPMC917-20/21)
Figure 5-1 : Interrupt Control/Status Register (INTCSR, 0x4C)
The local interrupt 1 reflects the four channel UART interrupts (TPMC917-10 only). Bit 2 will be set if
bit 1 is set and an interrupt is generated on one or more UART channels. For more information see
chapter “Interrupt Status Register”.
The local interrupt 2 reflects the status of the backup battery supply voltage (either on board Lithium
Cell or external battery via P14 mezzanine connector). This register will be initialized from the on
board EEPROM after power-on the TPMC917 with the above shown initial values.
