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TPMC310 User Manual Issue 1.1.5
Page 9 of 22
3.2.1 CAN Control Register
Bit
Name
Function
Access Reset
7 :6
-
Reserved (Undefined for reads, write as '0')
-
X
5 CAN2_INTEN
0 : CAN CH2 Interrupt Disabled
1 : CAN CH2 Interrupt Enabled
R/W 0
4 CAN2_SEL
0 : CAN CH2 Transceiver Silent Mode
1 : CAN CH2 Transceiver Operating Mode
R/W 0
3 CAN2_RST#
0 : CAN CH2 Controller Reset Mode
1 : CAN CH2 Controller Operating Mode
R/W 0
2 CAN1_INTEN
0 : CAN CH1 Interrupt Disabled
1 : CAN CH1 Interrupt Enabled
R/W 0
1 CAN1_SEL
0 : CAN CH1 Transceiver Silent Mode
1 : CAN CH1 Transceiver Operating Mode
R/W 0
0 CAN1_RST#
0 : CAN CH1 Controller Reset Mode
1 : CAN CH1 Controller Operating Mode
R/W 0
Table 3-3 : CAN Control Register
After power-up or board reset the CAN controllers are set to reset mode.
To set the CAN controllers to operating mode, the CANx_RST# bit must be set to ‘1’.
After power-up or board reset the CAN bus transceivers are set to silent mode.
To set the CAN bus transceivers to operating mode, the CANx_SEL bit must be set to ‘1’.
Disabling interrupts in the CAN Control Register only affects the interrupt mapping to the
PCI9030 LINTx# local interrupt inputs. It will not affect the interrupt source of the SJA1000 CAN
controllers.
If enabled, the CAN CH1 interrupt source is mapped to the PCI9030 LINT1# local interrupt input.
If enabled, the CAN CH2 interrupt source is mapped to the PCI9030 LINT2# local interrupt input.
The PCI9030 LINTx# local interrupt inputs are used in active low level sensitive mode.
The CAN interrupts must be acknowledged via SJA1000 registers (CAN Controller Register
Space).
Please see the SJA1000 CAN Controller Manual for more information.