Tews Technologies TPMC310, User Manual

Page: 18 / 22

TPMC310 User Manual Issue 1.1.5 Page 18 of 22
Clock Divider Register:
The SJA1000 Clock Divider Register must be programmed as follows (for both SJA1000 CAN
controllers in the SJA1000 controller internal reset mode - see SJA1000 Control Register in the
SJA1000 CAN Controller Manual):
Bit Symbol Description
7 CAN MODE
0 : BasiCAN Mode
1 : PeliCAN Mode
6 CBP 1 : Bypass input comparator, use RX0 only
5 RXINTEN 0 : Disable Interrupts on TX1 output
4 - 0
3 CLOCK OFF 1 : Disable Clock Output (not used)
2 CD2 0
1 CD1 0
0 CD0 0
Table 5-2 : Clock Divider Register
Baud Rate Range:
The TPMC310 uses the TJA1050 High-Speed CAN transceiver.
The TJA1050 High-Speed CAN Transceiver supports baud rates from 60 kbaud up to 1 Mbaud.