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TPMC310 User Manual Issue 1.1.5
Page 17 of 22
5 Programming Hints
5.1 CAN Controller (SJA1000)
Clock Source:
The SJA1000 clock input frequency is 16 MHz (for both SJA1000 CAN controllers).
Reset Mode:
After power-up or board reset the SJA1000 CAN controllers are held in “reset mode”.
To bring the SJA1000 CAN controllers out of reset mode, the CANx_RST# bit(s) in the CAN Control
Register (PLD Register Space) must be set.
Silent Mode:
After power-up or board reset the CAN bus transceivers are held in “silent mode”.
To bring the CAN bus transceivers to operating mode, the CANx_SEL bit(s) in the CAN Control
Register (PLD Register Space) must be set.
Output Control Register:
The SJA1000 Output Control Register must be programmed as follows (for both SJA1000 CAN
controllers in the SJA1000 controller internal reset mode - see SJA1000 Control Register in the
SJA1000 CAN Controller Manual):
Bit
Symbol
Description
7 OCTP1
6 OCTN1
11 : Push-Pull output stage
5
OCPOL1
0 : Normal polarity
4 OCTP0
3 OCTN0
11 : Push-Pull output stage
2
OCPOL0
0 : Normal polarity
1 OCMODE1
0 OCMODE0
01 : Test Output Mode
10 : Normal Output Mode
Table 5-1 : Output Control Register