Chapter 4: Software
CAN-Engine
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4-4
outportb(0x0101,0);
outportb(0x0102,0x01);
// I20=ADCS high
The chip select lines are by default set to 15 wait states. This makes it possible to interface with many
slower external peripheral components. If you require faster I/O access, you can modify this number down
as needed. Some TERN components, such as the Real-Time-Clock, might fail if the wait state is decreased
too dramatically. A function is provided for this purpose.
void io_wait
Arguments: char wait
Return value: none.
This function sets the current wait state depending on the argument wait.
wait=0, wait states = 0, I/O enable for 100 ns
wait=1, wait states = 1, I/O enable for 100+25 ns
wait=2, wait states = 2, I/O enable for 100+50 ns
wait=3, wait states = 3, I/O enable for 100+75 ns
wait=4, wait states = 5, I/O enable for 100+125 ns
wait=5, wait states = 7, I/O enable for 100+175 ns
wait=6, wait states = 9, I/O enable for 100+225 ns
wait=7, wait states = 15, I/O enable for 100+375 ns
4.2.2
External Interrupt Initialization
There are up to eight external interrupt sources on the CAN-Engine, consisting of seven maskable interrupt
pins (INT6-INT0) and one non-maskable interrupt (NMI). There are also an additional eight internal
interrupt sources not connected to the external pins, consisting of three timers, two DMA channels, both
asynchronous serial ports, and the NMI from the watchdog timer. For a detailed discussion involving the
ICUs, the user should refer to Chapter 7 of the AMD Am186ES Microcontroller User’s Manual.
TERN provides functions to enable/disable all of the eight external interrupts. The user can call any of the
interrupt init functions listed below for this purpose. The first argument indicates whether the particular
interrupt should be enabled, and the second is a function pointer to an appropriate interrupt service routine
that should be used to handle the interrupt. The TERN libraries will set up the interrupt vectors correctly
for the specified external interrupt line.
At the end of interrupt handlers, the appropriate in-service bit for the IR signal currently being handled must
be cleared. This can be done using the Nonspecific EOI command. At initialization time, interrupt
priority was placed in Fully Nested mode. This means the current highest priority interrupt will be handled
first, and a higher priority interrupt will interrupt any current interrupt handlers. So, if the user chooses to
clear the in-service bit for the interrupt currently being handled, the interrupt service routine just needs to
issue the nonspecific EOI command to clear the current highest priority IR.
To send the nonspecific EOI command, you need to write the EOI register word with 0x8000.
outport(0xff22, 0x8000);
void intx_init
Arguments: unsigned char i, void interrupt far(* intx_isr) () )
Return value: none
These functions can be used to initialize any one of the external interrupt channels (for pin locations and
other physical hardware details, see the Hardware chapter). The first argument i indicates whether this
particular interrupt should be enabled or disabled. The second argument is a function pointer which will act
as the interrupt service routine. The overhead on the interrupt service routine, when executed, is about 20
µ
s.
