Telink TLSR8232 BLE SDK Developer Handbook
AN-19112700-E1
23
Ver.1.0.0
Whenever functions resident in RAM are call
ed, it isn’t needed to re-read them from
Flash, thus time will be saved. Therefore, the functions with limited execution time
should be memory resident to increase execution efficiency. In SDK, some functions
related to BLE timing sequence need frequent execution, in order to decrease
execution time and save power consumption, these functions are memory resident.
Users can set a function as memory resident by adding the keyword
“_attribute_ram_code_” as function flash_erase_sector above. After compiling, users
can find this function in ramcode section of list files.
The vector and ramcode in firmware should be loaded to RAM when MCU powers
on. After compiling, the total size of the two parts is “_ramcode_size_”, which is a
variable recognizable by compiler. Its calculation is implemented in “boot.link”. As
shown below, the compiling result “_ramcode_size_” equals the code size of vector
and ramcode.
. = 0x0;
.vectors :
{
*(.vectors)
*(.vectors.*)
}
.ram_code :
{
*(.ram_code)
*(.ram_code.*)
}
PROVIDE(_ramcode_size_ = . );
// Calculate actual ramcode size (
ramcode)
PROVIDE(_ramcode_size_div_16_ = (. + 15 ) / 16);
PROVIDE(_ramcode_size_div_256_ = (. + 255) / 256);
PROVIDE(_ramcode_size_div_16_align_256_ = ( (. + 255) / 256) *
16);
2) cache
cache is high-speed instruction buffer of MCU, and it must be configured as a
section in SRAM. cache size is fixed as 2.25K (0x900), including 256-byte tag and
2048-byte Instructions cache.
Memory resident code can be directly read and executed from memory, however,
only a small part of firmware is memory resident code, and the majority are still in
Flash. According to program locality principle, a part of Flash code can be stored in
cache. Thus, if the code to be executed is in cache, instructions can be directly read
and executed from cache; otherwise the code must be read from Flash to replace
the old code in cache, and then MCU reads and executes instructions from cache.