Circuit Description— Type 1L40
Fig. 3-2. S im plified equivalent o f the h yb rid dire ctio n a l coupler.
The mixer output frequency at the IF port of the diplexer
is applied through a 1 dB resistive coupler and the 280 MHz
low pass filter to the wide band IF section. The resistive
coupler provides a DC return for the mixer peaking circuit.
Efficient mixer action depends on the mixer diode bias
and is a function of the local oscillator drive, the desired
harmonic conversion and the mixer diode current. Since
scales 2, 3, 4 and 5 use higher order harmonics of the
oscillator fundamental frequency range of 1.7 GHz to 4.2
GHz, mixer peaking enhances harmonic conversion. MIXER
PEAKING control R66 provides control over the amount
of bias to diode D64. This enriches the harmonic con
tent of the rectified signal and optimizes the sensitivity of
the mixer at the different harmonic frequencies being used.
The IF output from the diplexer is filtered through the
280 MHz low pass filter to reduce spurious signals above
this passband.
This attentuation, plus the 150-250 MHz
bandpass filter that follows, suppresses signals in the image
frequency band (300 MHz to 400 MHz) of the 200 MHz IF
amplifier.
Lossy cables (such as W78, W94) are used to reduce
the VSWR (voltage standing-wave ratio) caused by slight
impedance mismatch between circuits that may be caused
by coaxial connectors or other discontinuities.
NOTE
Lossy cables use steel w ire fo r the center conduc
tor. These fa c to ry -in s ta lle d cables are used to
optim ize response flatness and sensitivity.
The
lossy ca b le is id e n tifie d by the w h ite insulating
c o a tin g .
The standard 50 12 c o a x ia l ca b le has
cle a r in su la tio n . Do not interchange these cables.
Phase Lock Circuit
The phase lock circuit (See Phase Lock Circuit Schematic)
synchronizes the local oscillator frequency with a stable
reference frequency. This reduces oscillator d rift and inci
dental frequency modulation, permitting high resolution and
narrow dispersion settings for signal evaluation.
The phase detector samples the instantaneous RF signal
voltage generated by the tunable local oscillator at a rate
determined by the reference frequency. The samples are in
tegrated and compared to a DC reference voltage. The
output from the comparator is then amplified and fed back
to the local oscillator as a corrective signal.
When the local oscillator frequency is an exact multiple
of the reference frequency, the phase detector output
becomes a DC voltage that is proportional to the instantan
eous potential of the sampled oscillator voltage.
If the
phase of the local oscillator frequency should drift, the
phase detector output potential w ill change. This change
is amplified through Q860-Q870 and applied as a correc
tive voltage to a voltage controlled capacitance diode
in the oscillator tuned cirucit. This shifts the phase of the
oscillator so it remains phase locked to the reference
frequency. See Fig. 3-3 and Fig. 3-4.
The corrective signal from the comparator and amplifier
is also applied to the vertical circuit when the LOCK CHECK
button SW889 is depressed. This provides a beat frequency
signal indication on the CRT so the operator can locate a
lock point. Beat frequency displays appear on the CRT
screen as the local oscillator is tuned (see Operating
section). A reference voltage related to the position of
the FINE RF CENTER FREQ control is also applied to the
vertical deflection circuit and is used to center the error
signal within the dynamic operating range of the compara
tor am plifier Q860-Q870. Phase lock operation should be
set within the dynamic range of the amplifier, preferably
in the center of the dynmaic range. This dynamic range is
visually displayed on the CRT as a vertical shift of the
display.
Turning the INT REF FREQ control clockwise from its OFF
OR EXT REF FREQ IN position closes SW809 so collector
voltage is applied to Q800. The crystal controlled 1 MHz
oscillator w ill now operate. The output 1 MHz signal from
the emitter of Q810 is applied to the trigger generator
circuit. Diodes D824 and D825 limit the current through
tunnel diode D826, and couples the signal to the 1 MHz
MARKER OUT connector J810. If an external reference signal
is applied and the INT REF FREQ control is set to OFF OR
EXT REF FREQ IN, the diodes couple the external reference
signal to the trigger generator circuit.
Frequency of the reference oscillator Q800 is primarily
controlled by crystal Y800, inductor L800 and the capaci
tance of diodes D817 and D818. Diodes D817 is back
biased and normally acts as a voltage-controlled capaci
tance diode; however, signal amplitudes across crystal Y800
may become excessive and D817 may conduct on the peak
signal swing. D818 then becomes back biased and acts as
the capacitance diode. The back bias for diode D817 is
set by INT REF FREQ control R809.
Adjusting R809
changes the back bias of the diode, which changes the
capacitance in series with the crystal series-resonant and
parallel-resonant operating modes.
The frequency range
is typically 1 MHz + 200 Hz to 1 MHz + 1.2 kHz.
W ith dispersion settings of lOOkHz/cm or less, high fre
quency RF signals mixing with the higher harmonics of the
local oscillator w ill shift off-screen when the local oscillator
shifts to the next phase lock mode. These frequency gaps
between lock modes are covered by shifting the frequency
of the internal phase lock reference oscillator. The INT REF
®
3-3
Summary of Contents for 1L40
Page 30: ...Fig 3 1 Type 1L40 Block Diagram CO K ISO 2 5 0 MHz 75 MHz Circuit Description Type 1L40 ...
Page 40: ...NOTES ...
Page 54: ...NOTES ...
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Page 119: ...T Y P E I L 4 0 S F t C T R U M A N A U V t R A ...
Page 120: ...L R O G 8 R F P H A S E L O C K D I A G R A M A ...
Page 124: ... 75V T Y P L I L A Q S P f c C T R U M A N A L Y Z t R ...
Page 126: ... T y p t S P E C T R u M A N A U V 2 f e R A ...
Page 127: ...4 A P H A S t L O C K C I R C U I T ...
Page 128: ...iv r AMPUH19 1 rRon J9A 4 T Y P E L 4 0 S P E C T R U M A N A L Y Z C R A I ...
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Page 134: ... IS MHZ IP lO M Hx OSCILLATOR r T Y P E IL 4 0 SPECTRUM ANALYZED ...
Page 135: ... lL I z 5 a or lJ ui Ul X i u tt O a i d id u it l h 5 12 2 a or PO S 3 J3 ...
Page 139: ...DETECTORS i 4 1066 OUTPUT AMPLIPIER ...
Page 140: ...FIG 1 FRONT REAR TYPE 1L40 SPECTRUM ANALYZER ...
Page 141: ...FIG 2 IF CHASSIS PHASE LOCK AS 6 1 ...
Page 142: ...F CHASSIS PHASE LOCK ASSEMBLIES TYPE 1L40 SPECTRUM ANALYZER ...
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