Supero PDSLA, User Manual

Page: 42 / 80

2-22
PDSLA/PDSLE User's Manual
CPU Front Side Bus Speed
JFSB1 and JFSB2 allow you to set the
Front Side Bus Frequency. See the table
on the right for pin defi nitions. (*Default
is Auto.)
S
UPER
DSLA/PDSLE
PCI-E x1
®
LGA 775 Processor
KB/MS
Parallel
Port
COM1
VGA
USB
3/4/5/6
USB1/2
JFUSB1
Fan3
Clock
945G/P
(Lakeport)
North Bridge
PCI-E x16
LAN
CTRL
JPL1
GLAN Enable
CD in Aux.In
AC97
COM2
BIOS
CL CMOS
J L 1
WOL
I-SATA0
F
P
CTRL
Fan
2
JF 1
Buzzer
ID
E
24
-Pin
ATX
P
W
R
Su
p
e
rI/
O
F/P USB7/8
ICH7
J 9
DIMM#1A DIMM#2A DIMM#1B DIMM#2B
Floppy Audio
JBT1
J 3
J 2 7
J 4 0
South Bridge
J 1 3
J 4 5
J 1 1
J44
JG1
J 3 1
J 3 0
Battery
PCI#4 -33MHz
4-Pin ATX PWR
J 4 1
J 2 8
JPUSB1
JFUSB2
J7
J 1
PCI-E x1
J 8
PC I4
PCI#3 -33MHz
PC I3
PC I2 PCI#2-33MHz
PCI#1-33MHz PC I1
J P 1
J P 2
J PU SB 2
F/P USB Wake-up
J 4 3
I-SATA1
I-SATA2
I-SATA3
D2
4
JWD
JLED
LE 1
J WO R
RJ45
Fan1/CPU
Slot#1
Slot#2
Slot#3
Slot#5
Slot#4
Slot#6
Slot#7
FP Aud
J12
(*PDSLA
)
CPU FSB Speed
Speaker