Supermicro X5DPL-TGM, User Manual

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UPER X5DPL-TGM User’s Manual
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PCI Slot Configuration
PCI/PCIX Frequency (Slot 4-5)
This setting controls the bus speed of PCI-X slots # 4 and 5. Options
are PCI 33 MHz, PCI 66 MHz, PCI-X 100 MHz, PCI-X 133 MHz and
Auto .
PCI/PCIX Frequency (Slot 6)
This setting controls the bus speed of PCI-X slots # 4 and 5. Options
are PCI 33 MHz, PCI 66 MHz, PCI-X 100 MHz, PCI-X 133 MHz and
Auto .
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PCI Device, Slot 1
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PCI Device, Slot 2
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PCI Device, Slot 3
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PCI Device, Slot 4
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PCI Device, Slot 5
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PCI Device, Slot 6
Option ROM Scan
This setting (included in the submenu for the above six settings) will
initialize the selected device's expansion ROM when enabled.
Options are Enabled and Disabled.
Enabled Master
This setting (included in the submenu for the above six settings) will
designate the selected device as the PCI bus master when enabled.
Options are Enabled and Disabled .
Latency Timer
This setting (included in the submenu for the above six settings)
sets the minimum guaranteed time allotted to the bus master in
units of PCI bus clocks. Options are Default , 0020h, 0040h,
0060h, 0080h, 00A0h, 00C0h and 00E0h.