Sun Microsystems Netra T4 AC100, Service And System Reference Manual

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E-12 Netra T4 AC100/DC100 Service and System Reference Manual • August 2001
{1}Test cell disturbance
{0}Test cell disturbance
{1}Test data reliability
{0}Test data reliability
{1}Test address line transitions
{0}Test address line transitions
{1}* Ecache Init
{0}* Ecache Init
{1}* Correctable Ecache ECC Test
{0}* Correctable Ecache ECC Test
{1}* Uncorrectable Ecache ECC Test
{0}* Uncorrectable Ecache ECC Test
{1}* Correctable SW Ecache ECC Test
{0}* Correctable SW Ecache ECC Test
{1}* Uncorrectable SW Ecache ECC Test
{0}* Uncorrectable SW Ecache ECC Test
{1}* Correctable System ECC Test
{0}* Correctable System ECC Test
{1}* Uncorrectable System ECC Test
{0}* Uncorrectable System ECC Test
{1}* Memory address selection All Banks
{0}* Memory address selection All Banks
{0}* Memory marching All Banks
{1}* Memory marching All Banks
{0}* Safari registers
{0}Safari ID reg fc000000.0011a954
{1}* Map PCI B space
{0}* Map PCI A space
{1}* Schizo reg test
{0}* Schizo reg test
{1}PBM B registers
{0}PBM A registers
{1}Iommu B registers
{0}Iommu A registers
{1}Streaming Cache B registers
{0}Streaming Cache A registers
{1}Mondo Interrupt B registers
{0}Mondo Interrupt A registers
{1}* Schizo pci B id test
{1}PCI B Vendor ID 108e
{0}* Schizo pci A id test
{1}PCI B Device ID 8001
{0}PCI A Vendor ID 108e
CODE EXAMPLE E-1 diag-level
Variable Set to
max
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