36
Table 2-6Memory Channel Rule of Blade
Memory Amount
4
8
12
16
20
24
28
32
CPU0_DIMMA0
●
●
●
●
●
●
●
●
CPU0_DIMMA1
●
●
●
●
CPU0_DIMMB0
●
●
●
●
●
●
●
CPU0_DIMMB1
●
●
●
CPU0_DIMMC0
●
●
●
●
●
●
CPU0_DIMMC1
●
●
CPU0_DIMMD0
●
●
●
●
●
CPU0_DIMMD1
●
CPU1_DIMMA0
●
●
●
●
●
●
●
●
CPU1_DIMMA1
●
●
●
●
CPU1_DIMMB0
●
●
●
●
●
●
●
CPU1_DIMMB1
●
●
●
CPU1_DIMMC0
●
●
●
●
●
●
CPU1_DIMMC1
●
●
CPU1_DIMMD0
●
●
●
●
●
CPU1_DIMMD1
●
CPU2_DIMMA0
●
●
●
●
●
●
●
●
CPU2_DIMMA1
●
●
●
●
CPU2_DIMMB0
●
●
●
●
●
●
●
CPU2_DIMMB1
●
●
●
CPU2_DIMMC0
●
●
●
●
●
●
CPU2_DIMMC1
●
●
CPU2_DIMMD0
●
●
●
●
●
CPU2_DIMMD1
●
CPU3_DIMMA0
●
●
●
●
●
●
●
●
CPU3_DIMMA1
●
●
●
●
CPU3_DIMMB0
●
●
●
●
●
●
●
CPU3_DIMMB1
●
●
●
