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FCC Notice:

This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of
FCC Rules.  These limits are designed to provide reasonable protection against harmful interference in a residential
installation.  This equipment generates, uses and can radiate radio frequency energy.  If not installed and used properly, in
strict accordance with the manufacturer’s instructions, may cause harmful interference to radio communications.
However, there is no guarantee that interference will not occur in a particular installation.  If this equipment does cause
interference to radio or television reception, which can be determined by turning the equipment off and on, the user is
encouraged to try to correct the interference by one or more of the following measures :

Reorient or relocate the receiving antenna.

Increase the separation between the equipment and receiver.

Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

Consult the dealer or an experienced radio/television technician for help and for additional suggestions.

The user may find the following booklet prepared by the Federal Communications Commission helpful  “How to Identify
and Resolve Radio-TV Interference Problems.”  This booklet is available from the U.S. Government Printing Office.
Washington, DC 20402, Stock 004-000-00345-4

FCC Warning

The user is cautioned that changes or modifications not expressly approved by the manufacturer could void the user’s
authority to operate this equipment.

Note :  In order for an installation of this product to maintain compliance with the limits for a Class B device, shielded
cables and power cord must be used.

NOTICE

Copyright  1997.

All Right Reserved

Manual Ver 3.0

All information, documentation, and specifications contained in this manual are subject to change without prior
notification by the manufacturer.

The author assumes no responsibility for any errors or omissions which may appear in this document nor does it
make a commitment to update the information contained herein.

TRADEMARKS

Intel is a registered trademark of Intel Corporation

Pentium

 

 Processor is a registered trademark of Intel Corporation

PC/AT is a registered trademark of International Business Machine Corporation.

PS/2 is a registered trademark of IBM Corporation.

All other brand and product names referred to in this manual are trademarks or registered trademarks of their
respective holders.

CE  Notice:

Following standards were applied to this product, in order to achieve compliance
with the electromagnetic compatibility:
- Immunity in accordance with  EN 50082-1: 1992
- Emmitions in accordance with EN 55022: 1987 Class B.

Summary of Contents for HOT-557

Page 1: ...User s Manual 1 HOT 557 Layout Version 1 5 Pentium processor Based PCI MAIN BOARD User s Manual...

Page 2: ...Radio TV Interference Problems This booklet is available from the U S Government Printing Office Washington DC 20402 Stock 004 000 00345 4 FCC Warning The user is cautioned that changes or modificatio...

Page 3: ...e Selection JP29 JP30 11 Flash EPROM Jumper JP19 12 Clear CMOS JP21 12 Clear Password JP9 13 Display Mode Jumper JP7 13 Factory Reserved Jumpers JP39 JP43 JP44 13 Connectors Sockets 14 CHAPTER 3 MEMOR...

Page 4: ...tel s 82430VX PCIset chipset provides increased integration and improved performance over other chipset designs The 82430VX PCIset chipset provides an integrated Bus Mastering IDE controller with two...

Page 5: ...o banks of EDO Fast Page Mode DRAM or 3 3V Sync DRAM ranging from 8MB to 128MB Supports 4MB 8MB 16MB 32MB 72 pins SIMMs or 8MB 16MB 32MB 168 pin DIMMs Cache Memory Integrated L2 write back cache contr...

Page 6: ...y port One parallel port Supports SPP PS 2 compatible bidirectional Parallel Port EPP Enhanced Parallel Port andECP Extended Capabilities Port high performance parallel port Two serial ports Supports...

Page 7: ...User s Manual 7 Jumpers Chapter2 Hardware Configuration...

Page 8: ...Jumpers JP23 and JP24 to figure the CPU core clock multiplier By inserting or removing jumper caps on JP23 and JP24 the user can change theHost Bus Clock CPU Core Clock ratio from 1 1 5 to 1 3 Intel P...

Page 9: ...1 75 x PR150 105 MHz 60 MHz 1 75 x PR133 100 MHz 66 MHz 1 5 x PR120 90 MHz 60 MHz 1 5 x PR100 100 MHz 66 MHz 1 5 x PR90 90 MHz 60 MHz 1 5 x PR75 75 MHz 50 MHz 1 5 x Cyrix IBM 6x86 6x86L CPU Type Syste...

Page 10: ...ssors and also provide dual 3 3 2 8V voltage VIO VCORE separated for Intel P55C Cyrix IBM 6x86L and AMD future processors Onboard Regulator Output J100 J101 J102 J107 Single Voltage Output VIO VCORE V...

Page 11: ...size can be field upgraded to 512KB by installing a secondary 256KB pipeline burst cache module into the CELP socket 256KB Cache Memory On mainboard integrate 256KB pipeline burst cache mounted or a...

Page 12: ...ed DS12B887 Close jumper JP21 turn on power for 2 to 3 seconds then release JP21 and turn off power CMOS will be discharged Clear CMOS JP21 Flash EPROM Jumper JP19 HOT 557 mainboard supports two types...

Page 13: ...re should only be done if the user password has been forgotten This function is not available when AMD K5 or Cyrix 6x86 CPU is in use Display Mode Jumper JP7 Factory Reserved Jumpers JP39 JP43 JP44 On...

Page 14: ...onnect to ground GND Connectors Sockets Connectors Sockets ITEM FUNCTION J2 J3 J4 J5 On board SIMM sockets DIM1 DIM2 On board 3 3V DIMM sockets J23 J17 J18 J19 On board PCI Slots J20 J21 J22 On board...

Page 15: ...n The user should not populate both 5V SIMM modules 3 3V DIMM modules at the same time The four SIMM sockets are arranged in two banks of two sockets each the two DIMM socket are also arranged in two...

Page 16: ...MB 40 MB 8 MB 8 MB 16 MB 16 MB 48 MB 16 MB 16 MB 8 MB 8 MB 48 MB 16 MB 16 MB 16 MB 16 MB 64 MB 32 MB 32 MB 64 MB 32 MB 32 MB 64 MB 4 MB 4 MB 32 MB 32 MB 72 MB 32 MB 32 MB 4 MB 4 MB 72 MB 8 MB 8 MB 32...

Page 17: ...om of the screen during the POST Power On Self Test press Del key or simultaneously press Ctrl Alt and Esc keys TO ENTER SETUP BEFORE BOOT PRESS CTRL ALT ESC OR DEL KEY If the message disappears befor...

Page 18: ...he items of chipset features Power Management Setup This setup page includes all the items of Power Management features PCI Configuration setup This item specifies the value in units of PCI bus blocks...

Page 19: ...IDE HDD auto detection Automatically configure IDE hard disk drive parameters Supervisor Password Change set or disable supervisor password It allows you to limit access to the system and Setup or ju...

Page 20: ...Press PgUp or PgDn to select a numbered hard disk type or type the number and press Enter Note that the specifications of your drive must match with the drive table The hard disk will not work properl...

Page 21: ...you do not have to select the type in Setup Error halt This item determines if the system will stop when an error is detected during power up Memory This item is display only It is automatically dete...

Page 22: ...ower on the computer If it is set to Enabled BIOS will shorten or skip some check items during POST Boot Sequence This item determines which drive computer searches first for the disk operating system...

Page 23: ...will not boot and access to Setup will be denied if the correct password is not entered at the prompt When Setup is selected the system will boot but access to Setup will be denied if the correct pas...

Page 24: ...Configuration is disabled this item will not show up DRAM RAS Precharge Time DRAM must continually be refreshed or it will lose its data Normally DRAM is refreshed entirely as the result of a single r...

Page 25: ...ng used depends on the type of DRAM standard page mode or EDO burst mode on a per bank basis The options are x4444 x3333 and x2222 Fast MA to RAS Delay CLK This item is used to set Fast MA Memory Addr...

Page 26: ...clocks 16 Bit I O Recovery Time This item allows you to determine the recovery time allowed for 16 bit I O Choices are from NA 1 to 4 CPU clocks Memory Hole At 15M 16M In order to improve performance...

Page 27: ...sed such that all tim ers are in their maximum value Max Saving Predefined timer values are used such that all timers minimum value PM Control by APM If this item set to No system BIOS will ignore and...

Page 28: ...DD s motor off when system is in SUSPEND mode Disable HDD s motor will not be turn off IRQ3 5 8 12 Wake Up Events In Doze Standby If these items set to Off the IRQ3 5 8 or 12 event s activity will not...

Page 29: ...perating system as Windows 95 Reset Configuration Data This item allows you to determine reset the configuration data or not IRQ 3 4 5 7 9 10 11 12 14 15 assigned to These items allow you to determine...

Page 30: ...is an ISA device rather than a PCI controller If you have equipped your system with a PCI controller changing this allows you to specify which slot has the controller and which PCI interrupt A B C or...

Page 31: ...s for on board Primary Secondary Master PIO timing is Auto IDE Primary Secondary Slave PIO In this item there are five modes defined in manual mode and one automatic mode There are0 1 2 3 4 and AUTO T...

Page 32: ...abled IR Duplex Mode This item specifies onboard infrared transfer mode tofull duplex or half duplex Onboard Parallel Port This item specifies onboard parallel port address to378H 278H 3BCH or Disable...

Page 33: ...as restricted access to the options Thus by setting separate Supervisor and User password a system supervisor can limit who can change critical Setup values Enter Password Type the password up to eigh...

Page 34: ...rebooted or any time you try to enter Setup If you select Setup at Security Option of BIOS Features Setup Menu you will be prompted only when you try to enter Setup Warning Retain a safe record of you...

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