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User's Manual 25
7/6 : Seven clocks leadoff for reads and six clocks leadoff for writes.
6/5 : Six clocks leadoff for reads and five clocks leadoff for writes.
Fast RAS To CAS Delay
When DRAM is refreshed, both rows and columns are address separately.
This setup item allows you to determine the timing of the transition from
Row Address Strobe (RAS) to Column Address Strobe (CAS). The options
are
3
and
2
CLKs.
DRAM Read Burst (EDO/FP)
This item set the EDO/FP DRAM Read Burst Timing. The timing used
depends on the type of DRAM (EDO burst mode or standard fast page
mode) on a per-bank basis. The options are
x222/x333
,
x333/x444
, and
x444/x444
.
DRAM Write Burst Timing
This item set the DRAM Write Burst Timing. The timing used depends on
the type of DRAM (standard page mode or EDO burst mode) on a per-bank
basis. The options are
x4444
,
x3333
, and
x2222
.
Fast MA to RAS# Delay CLK
This item is used to set Fast MA (Memory Address) to RAS# Delay which
control DRAM Row Miss timings
Fast EDO Path Select
This item is used to defined fast path is selected for CPU to DRAM read
cycles for the leadoff, the options are "
Enable
" or "
Disable
".
Refresh RAS# Assertion
This item is used to set the number of clocks RAS# is asserted for Refresh
cycles.
SDRAM (CAS Lat/RAS-to-CAS)
This item is used to set CAS# Latency and RAS# to CAS# clock for
SDRAM. If SDRAMs absent, this item will not show up.
ISA Clock
This item allows the user to set ISA clock that divide from PCI clock by 3
or by 4. For example, if 166MHz Pentium processor is used, PCI clock will
be 33MHz, ISA Clock will be 8.25MHz when PCI clock divided by 4, and
11MHz when PCI clock divided by 3.