Package pin/
ball
Voltage range
External components
Comments
VCAP
VOS0/VOS1/
VOS2/VOS3/
SVOS3/SVOS4/
SVOS5
LDO enabled and SMPS enabled or disabled:
2.2 μF ESR < 100 mΩ for VCAP1
2.2 μF ESR < 100 mΩ for VCAP2
LDO disabled:
100 nF close to each VCAPx pin
VCAPx connected together
If the VCAP3 pin is available (depending on the
package), it must be connected to the other VCAP pins
but no additional capacitance is required.
In bypass mode the Vcore supply is externally provided
through the VCAPx pins.
VDD50USB
4.0 to 5.5 V
4.7 μF ceramic
Connected to an external supply or USB VBUS for an
internal USB regulator use case.
Connected to VDD33USB when the internal USB
regulator is not used (for packages having this pin
available).
VDD33USB
3.0 V to 3.6 V
1 μF ceramic and 100 nF ceramic (USB reg not
used)
1 μF max ESR 600 mΩ (USB reg used)
The V
DD33USB
supply can be provided externally or
through the internal USB regulator.
When the regulator is enabled its output will be provided
directly to the VDD33USB through the internal
connection.
This pin is internally tied to V
DD
when it is not present in
some specific packages. In consequence, the V
DD
supply level must be compliant with V
DD33
if the USB is
used for these packages.
0V to 3.6 V
-
When USB is not used.
VREF+
1.62 V to
≤ V
DDA
1 μF ceramic and
100 nF ceramic close to the pin
or connected to VDDA through a resistor
(typically 47 Ω)
V
REF+
is provided externally.
In some packages, the VREF+ pin is not available
(internally connected to V
DDA
).
2 V to
≤ V
DDA
External V
REF+
with V
DDA
>2 V and ADC used.
VREFBUF
reference
voltage
1 μF
V
REF+
is provided by the embedded VREFBUF regulator.
Do not activate the internal VREFBUF when V
REF+
is
provided externally
VREF-
V
SSA
Tied to VSSA
Only available in some packages
Internally tied to V
SSA
when this pin is not present
PDR_ON
V
DD
or V
SS
Tied to VDD
Power-on reset (POR) and power-down reset (PDR)
circuit switched ON
Internally tied to V
DD
when this pin is not present in a
specific package.
V
DD
: 1.71 to 3.6 V
Tied to VSS
POR and PDR circuit switched off
V
DD
: 1.62 to 3.6 V
AN5419
Introduction
AN5419
-
Rev 2
page 8/50