
Figure 2.
System supply configuration
External supply
V
CORE
V
CAP
V
DDLDO
V reg
(on)
3. SMPS supplies LDO (No External supply)
V
DDSMPS
V
LXSMPS
V
DD
SMPS
(on)
V
SSSMPS
V
FBSMPS
V
SS
V
CAP
V
DDLDO
V reg
(on)
4. External SMPS supply, supplies LDO
V
DD_extern
V
DDSMPS
V
LXSMPS
V
DD
SMPS
(on)
V
SSSMPS
V
FBSMPS
V
SS
V
CORE
V
CAP
V
DDLDO
V reg
(off)
5. External SMPS Supply & Bypass
V
DD_extern
V
DDSMPS
V
LXSMPS
V
DD
SMPS
(on)
V
SSSMPS
V
FBSMPS
V
SS
Ext
reg
V
CORE
6. Bypass
V
CAP
V
DDLDO
V reg
(off)
V
DDSMPS
V
LXSMPS
V
DD
SMPS
(off)
V
SSSMPS
V
FBSMPS
V
SS
V
CORE
V
CAP
V
DDLDO
V
DDSMPS
V
LXSMPS
SMPS
(off)
V reg
(on)
V
DDLDO
<= V
DD
1. LDO Supply
V
SSSMPS
V
FBSMPS
V
SS
V
CORE
V
DD
V
CAP
V
DDLDO
V
DDSMPS
V
LXSMPS
V reg
(off)
V
DD
2. Direct SMPS Supply
SMPS
(on)
V
SSSMPS
V
FBSMPS
V
SS
V
CORE
V
DD
V
DD
V
DD
V
DD
V
DD
AN5419
Introduction
AN5419
-
Rev 2
page 6/50