Figure 24.
Octo-SPI multiplexed interconnection example
STM32H7
PC11
OCSPI1_NCS
OCSPI1_CLK
OCSPI1_IO0….IO7
VDD
R
PU
VDD
Octo-SPI memory
CK
DQ[0:7]
CS
RESET#
NRST
VDD
V
CC
VDD
VDD
optional
8 bits
x8
CK#
OCSPI1_NCLK
OCSPI1_DQS
OCTOSPI1
OCTOSPI2
RWDS (=DQSM)
RSTO
INT
GPIO
GPIO
Port1
Port2
PG12
OCSPI2_NCS
10k
VDD
Octo-SPI memory
CK
DQ[0:7]
CS
RESET#
VDD
V
CC
optional
8 bits
CK#
RWDS (=DQSM)
RSTO
INT
GPIO
GPIO
PC5
PB2
PB12
PD11/PC10/PE2/PA1
PC1/PE8/PE9/PE10
OCT
OSPI I
O Mana
ger (OCT
OSPIM)
10k
22
22
In multiplexed mode, the same bus can be shared between two external Octo-SPI memories.
The multiplexed mode must be configured to avoid unwanted transactions when the OCTOSPIs are disabled.
The multiplexed mode can be very useful for some packages where the port2 is not mapped.
9.4.4
DFSDM interface
The digital filter for the sigma delta modulator (DFSDM) is dedicated to the external sigma-delta modulator’s
interface (refer to the reference manual
STM32H723/733, STM32H725/735 and STM32H730 advanced Arm
®
-
based 32-bit MCUs
(RM0468) for details). It can, for instance, handle data stream issued from sensors or pulse
density modulation (PDM) microphones.
The DFSDM embedded in STM32H723/33, STM32H725/35 and STM32H730 devices is composed of eight filters
(see reference manual
STM32H723/733, STM32H725/735 advanced and STM32H730 Arm
®
-based 32-bit MCUs
(RM0468))
Figure 25. Stereo microphone interconnection
shows an example of a stereo microphone interconnection.
AN5419
High speed signal layout
AN5419
-
Rev 2
page 40/50