ST SPC582B Series, Application Note, Page: 9 / 35

Figure 5. STCU2 faults
RGM
Error out
Reset request
reset
STCU2 FCCU
INTC
Interrupt request
Interrupt
Fault #7
Fault #6
Fault #8
Set
Clear
3.3.1 BIST result-wrong signature (STCU unrecoverable fault) (fault #6)
If the BIST detects a fault that is configured as unrecoverable fault, the STCU forwards this fault to the FCCU.
Note: The user shall configure the STCU to trigger either a recoverable or an unrecoverable fault if the BIST fails. This
configuration is done by programming the proper DCF records.
Although BIST is able to detect permanent faults, this fault can be also triggered in case of transient faults. The
STCU can trigger this fault only during BIST execution.
The user can inject this fault by the FCCU fake fault interface.
The user can inject a fake fault by setting the FCCU_RFF[FRFC] field to the value 0x06. The FCCU error reaction
path is verified if both the FCCU_RF_S0[RFS6] and the STCU2_ERR_STAT[UFSF] status bits are set.
The STCU2_ERR_STAT[UFSF] status bit indicates errors that trigger the unrecoverable fault condition, and it is
cleared by HW on clearing the relevant FCCU_RF_S0[RFS6] bit.
3.3.2 BIST result-wrong signature (STCU recoverable fault) (fault #7)
If the BIST detects a fault that is configured as recoverable fault, the STCU forwards this fault to the FCCU.
Note: The user shall configure the STCU to trigger either a recoverable or an unrecoverable fault if the BIST fails. This
configuration is done by programming the proper DCF records.
Although BIST is able to detect permanent faults, this fault can be also triggered in case of transient faults. The
STCU can trigger this fault only during BIST execution.
The user can inject this fault by the FCCU fake fault interface.
The user can inject a fake fault by setting the FCCU_RFF[FRFC] field to the value 0x07. The FCCU error reaction
path is verified if both the FCCU_RF_S0[RFS7] and the STCU2_ERR_STAT[RFSF] status bits are set.
The STCU2_ERR_STAT[RFSF] status bit indicates errors that trigger the recoverable faults condition, and it is
cleared by HW on clearing the relevant FCCU_RF_S0[RFS7] bit.
3.3.3 MBIST control activation (fault #8)
Unexpected activation of MBIST control signals may move the system RAM array into the BIST mode during the
execution of the application. The STCU detects this activation control and forwards this fault to the FCCU.
The user can inject this fault by the FCCU fake fault interface.
The user can inject a fake fault by setting the FCCU_RFF[FRFC] field to the value 0x08. The FCCU error reaction
path is verified if the FCCU_RF_S0[RFS8] status bit is set.
AN5752
STCU faults
AN5752 - Rev 1
page 9/35