3.5 Status Model
3 – 29
Weight
Bit
Flag
1
0
OVLD
2
1
ULIMIT
4
2
LLIMIT
8
3
ANTIWIND
16
4
RSTOP
32
5
undef (0)
64
6
undef (0)
128
7
undef (0)
OVLD : Amplifier Overload. Set to indicate an overload (either di
ff
er-
ential
or
common-mode) is presently occurring in the front-end
amplifier.
ULIMIT : Upper Limit Reached. Set to indicate the output signal is
presently saturated into the programmable upper-limit volt-
age.
LLIMIT : Lower Limit Reached. Set to indicate the output signal is
presently saturated into the programmable lower-limit volt-
age.
ANTIWIND : Anti-windup Active. Set to indicate the anti-windup circuit is
actively inhibiting integration of the error signal.
RSTOP : Ramp Stopped. Set to indicate that no internal setpoint ramp is
in progress; cleared to indicate ramping is presently underway.
3.5.8
Instrument Status (INSR)
The Instrument Status Register consists of (latching) event flags that
correspond one-to-one with the bits of the INCR (see above). Upon
the transition 0
→
1 of any bit within the INCR, the corresponding
bit in the INSR becomes set.
Bits in the INSR are una
ff
ected by the 1
→
0 transitions in the INCR,
and are cleared only by reading or with the
*CLS
command. Reading
a single bit (with the
INSR?
i
query) clears only bit
i
.
3.5.9
Analog to Digital Status Enable (INSE)
The INSE acts as a bitwise AND with the INSR register to produce
the single bit INSB message in the Status Byte Register (SB). It can be
set and queried with the
INSE(?)
command.
This register is cleared at power-on.
3.5.10
Analog to Digital Status (ADSR)
The Analog to Digital Status Register consists of 4 event flags; each
of which is set by a corresponding conversion completion for one of
SIM960 Analog PID Controller
