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M2i.30xx / M2i.30xx-exp Manual
Channel Trigger
Trigger modes and appendant registers
Channel trigger level
All of the channel trigger modes listed above require at least one trigger level to be set (except SPC_TM_NONE of course). Some modes like
the window triggers require even two levels (upper and lower level) to be set.
After the data has been sampled, the upper N data bits are compared with the N bits of the trigger levels. The following table shows the level
registers and the possible values they can be set to for your specific card.
As the trigger levels are compared to the digitized data, the trigger levels depend on the channels input range. For every input range available
to your board there is a corresponding range of trigger levels. On the different input ranges the possible stepsize for the trigger levels differs
as well as the maximum and minimum values. The table further below gives you the absolute trigger levels for your specific card series.
10 bit resolution for the trigger levels:
Trigger level representation depending on selected input range
The following example shows, how to set up a one channel board to trigger on channel 0 with rising edge. It is assumed, that the input range
of channel 0 is set to the the ±200 mV range. The decimal value for SPC_TRIG_CH0_LEVEL0 corresponds then with 16.0 mV, which is the
resulting trigger level.
Reading out the number of possible trigger levels
The Spectrum driver also contains a register that holds the value of the maximum possible different trigger levels considering the above men-
tioned exclusion of the most negative possible value. This is useful, as new drivers can also be used with older hardware versions, because
you can check the trigger resolution during run time. The register is shown in the following table:
In case of a board that uses 8 bits for trigger detection the returned value would
be 127, as either the zero and 127 positive and negative values are possi-
ble.The resulting trigger step width in mV can easily be calculated from the re-
turned value. It is assumed that you know the actually selected input range.
Register
Value
Direction
Description
Range
SPC_TRIG_CH0_LEVEL0
42200
read/write
Trigger level 0 channel 0: main trigger level / upper level if 2 levels used
-511 to +511
SPC_TRIG_CH1_LEVEL0
42201
read/write
Trigger level 0 channel 1: main trigger level / upper level if 2 levels used
-511 to +511
SPC_TRIG_CH2_LEVEL0
42202
read/write
Trigger level 0 channel 2: main trigger level / upper level if 2 levels used
-511 to +511
SPC_TRIG_CH3_LEVEL0
42203
read/write
Trigger level 0 channel 3: main trigger level / upper level if 2 levels used
-511 to +511
SPC_TRIG_CH0_LEVEL1
42300
read/write
Trigger level 1 channel 0: auxiliary trigger level / lower level if 2 levels used
-511 to +511
SPC_TRIG_CH1_LEVEL1
42301
read/write
Trigger level 1 channel 1: auxiliary trigger level / lower level if 2 levels used
-511 to +511
SPC_TRIG_CH2_LEVEL1
42302
read/write
Trigger level 1 channel 2: auxiliary trigger level / lower level if 2 levels used
-511 to +511
SPC_TRIG_CH3_LEVEL1
42303
read/write
Trigger level 1 channel 3: auxiliary trigger level / lower level if 2 levels used
-511 to +511
Input ranges
Triggerlevel
±200 mV
±500 mV
±1 V
±2 V
±5 V
±10 V
511
+199.6 mV
+499.0 mV
+998.0 mV
+1.996 V
+4.99 V
+9.98 V
510
+199.2 mV
+498.0 mV
+996.0 mV
+1.992 V
+4.98 V
+9.96 V
…
256
+100.0 mV
+250.0 mV
+500.0 mV
+1.00 V
+2.50 V
+5.00 V
…
2
+0.8 mV
+2.0 mV
+4.0 mV
+7.8 mV
+19.6 mV
+39.0 mV
1
+0.4 mV
+1.0 mV
+2.0 mV
+3.9 mV
+9.8 mV
+19.5 mV
0
0 V
0 V
0 V
0 V
0 V
0 V
-1
-0.4 mV
-1.0 mV
-2.0 mV
-3.9 mV
-9.8 mV
-19.5 mV
-2
-0.8 mV
-2.0 mV
-4.0 mV
-7.8 mV
-19.6 mV
-39.0 mV
…
-256
-100.0 mV
-250.0 mV
-500.0 mV
-1.00 V
-2.50 V
-5.00 V
…
-510
-199.2 mV
-498.0 mV
-996.0 mV
-1.992 V
-4.98 V
-9.96 V
-511
-199.6 mV
-499.0 mV
-998.0 mV
-1.996 V
-4.99 V
-9.98 V
Stepsize
0.4 mV
1.0 mV
2.0 mV
3.9 mV
9.8 mV
19.5 mV
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_CH0_MODE, SPC_TM_POS); // Setting up channel trig (rising edge)
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_CH0_LEVEL0, 40); // Sets triggerlevel to 16.0 mV
spcm_dwSetParam_i32 (hDrv, SPC_TRIG_CH_ORMASK0, SPC_TMASK0_CH0); // and enable it within the OR mask
Register
Value
Direction
Description
SPC_READTRGLVLCOUNT
2500
r
Contains the number of different possible trigger levels meaning ± of the value.
Trigger step width
Input Range
m
ax
Number of trigger levels
1
+
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