Spectrum M2i.3010, Hardware Manual

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80 M2i.30xx / M2i.30xx-exp Manual
Data organisation Acquisition modes
Data organisation
Data is organized in a multiplexed way in the transfer buffer. If using 4 channels, data of the first activated channel of first module comes
first, then data of first activated channel of second module, then second activated channel of first module and so on.
The samples are re-named for better readability. A0 is sample 0 of channel 0, C4 is sample 4 of channel 2, and so on.
Sample format
The 12 bit A/D samples are stored in two’s complement in the lower 12 bit of the 16 bit data word. 12 bit resolution means that data is
ranging from -2048…to…+2047. In standard mode the upper four bits contain the sign extension allowing to directly use the read data as
16 bit integer values. If digital inputs are activated these inputs are stored in the four upper bits. If overrange detection is activated the highest
bit is used to store the overrange information.
Converting ADC samples to voltage values
The Spectrum driver also contains a register that holds the value of the decimal value of the full scale representation of the installed ADC. This
value should be used when converting ADC values (in LSB) into real-world voltage values, because this register also automatically takes any
specialities into account, such as slightly reduced ADC resolution with reserved codes for gain/offset compensation.
In case of a board that uses an 8 bit ADC that provides the full ADC code (with-
out reserving any bits) the returned value would be 128. The the peak value for
a ±1.0 V input range would be 1.0 V (or 1000 mv).
A returned sample value of for e49 (decimal, two’s complement,
signed representation) would then convert to:
A returned sample value of for example -55 (decimal) would then convert to:
When converting samples that contain any additional data such as for example additional digital channels
or overrange bits, this extra information must be first masked out and a proper sign-extension must be per-
formed, before these values can be used as a signed two’s complement value for above formulas.
Activated Channels Ch0 Ch1 Ch2 Ch3 Samples ordering in buffer memory starting with data offset zero
1 channel X A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16
1 channel X B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16
1 channel X C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16
1 channel X D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16
2 channels X X A0 B0 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8
2 channels X X A0 C0 A1 C1 A2 C2 A3 C3 A4 C4 A5 C5 A6 C6 A7 C7 A8
2 channels X X A0 D0 A1 D1 A2 D2 A3 D3 A4 D4 A5 D5 A6 D6 A7 D7 A8
2 channels X X B0 C0 B1 C1 B2 C2 B3 C3 B4 C4 B5 C5 B6 C6 B7 C7 B8
2 channels X X B0 D0 B1 D1 B2 D2 B3 D3 B4 D4 B5 D5 B6 D6 B7 D7 B8
2 channels X X C0 D0 C1 D1 C2 D2 C3 D3 C4 D4 C5 D5 C6 D6 C7 D7 C8
4 channels X X X X A0 C0 B0 D0 A1 C1 B1 D1 A2 C2 B2 D2 A3 C3 B3 D3 A4
Bit Standard Mode Digital inputs (option)
enabled Overrange enabled Overrange and digital
inputs (option) enabled
D15 ADx Bit 11 (MSB) Digital bit 3 of channel x Overrange of channel x Overrange of channel x
D14 ADx Bit 11 (MSB) Digital bit 2 of channel x ADx Bit 11 (MSB) Digital bit 2 of channel x
D13 ADx Bit 11 (MSB) Digital bit 1 of channel x ADx Bit 11 (MSB) Digital bit 1 of channel x
D12 ADx Bit 11 (MSB) Digital bit 0 of channel x ADx Bit 11 (MSB) Digital bit 0 of channel x
D11 ADx Bit 11 (MSB) ADx Bit 11 (MSB) ADx Bit 11 (MSB) ADx Bit 11 (MSB)
D10 ADx Bit 10 ADx Bit 10 ADx Bit 10 ADx Bit 10
D9 ADx Bit 9 ADx Bit 9 ADx Bit 9 ADx Bit 9
D8 ADx Bit 8 ADx Bit 8 ADx Bit 8 ADx Bit 8
D7 ADx Bit 7 ADx Bit 7 ADx Bit 7 ADx Bit 7
D6 ADx Bit 6 ADx Bit 6 ADx Bit 6 ADx Bit 6
D5 ADx Bit 5 ADx Bit 5 ADx Bit 5 ADx Bit 5
D4 ADx Bit 4 ADx Bit 4 ADx Bit 4 ADx Bit 4
D3 ADx Bit 3 ADx Bit 3 ADx Bit 3 ADx Bit 3
D2 ADx Bit 2 ADx Bit 2 ADx Bit 2 ADx Bit 2
D1 ADx Bit 1 ADx Bit 1 ADx Bit 1 ADx Bit 1
D0 ADx Bit 0 (LSB) ADx Bit 0 (LSB) ADx Bit 0 (LSB) ADx Bit 0 (LSB)
Register Value Direction Description
SPC_MIINST_MAXADCVALUE 1126 read Contains the decimal code (in LSB) of the ADC full scale value.
V
in
49 1000 mV
128
----------------------------------------------
×
382.81 mV
= =
V
in
55 –
1000 mV
128
----------------------------------------------
×
429.69 mV –
= =