Spectrum Digital, Inc
2-17
2.1.1.2.24 Register 723, CCD Internal I/O Read/Write Register 2
Register 723 is a 8 bit, read/write register that controls CPLD GPIO input on read, and
out value on write. The default data is 0b00000000. The table below shows the
mapping of these bits.
2.1.1.2.25 Register 724, CCD Internal I/O Direction Register 3
Register 724 is a 8 bit, read/write register that controls CPLD GPIO to CCD Connector
pin input/output mapping. The default data is 0b11111111. The table below shows the
mapping of these bits.
Table 22: Register 723, CCD Internal I/O Read/Write Register 2
Bit #
Signal
State Action
7
0 = GPIO_0.7
Write bit when DIR = 0
Read bit when DIR = 1
6
0 = GPIO_0.6
Write bit when DIR = 0
Read bit when DIR = 1
5
0 = GPIO_0.5
Write bit when DIR = 0
Read bit when DIR = 1
4
0 = GPIO_0.4
Write bit when DIR = 0
Read bit when DIR = 1
3
0 = GPIO_0.3
Write bit when DIR = 0
Read bit when DIR = 1
2
0 = GPIO_0.2
Write bit when DIR = 0
Read bit when DIR = 1
1
0 = GPIO_0.1
Write bit when DIR = 0
Read bit when DIR = 1
0
0 = GPIO_0.0
Write bit when DIR = 0
Read bit when DIR = 1
Table 23: Register 724, CCD Internal I/O Direction Register 3
Bit #
Signal
State Action
7
0 = GPIO_2.7DIR
0 = Outputs, 1 = Inputs
6
0 = GPIO_2.6DIR
0 = Outputs, 1 = Inputs
5
0 = GPIO_2.5DIR
0 = Outputs, 1 = Inputs
4
0 = GPIO_2.4DIR
0 = Outputs, 1 = Inputs
3
0 = GPIO_2.3DIR
0 = Outputs, 1 = Inputs
2
0 = GPIO_2.2DIR
0 = Outputs, 1 = Inputs
1
0 = GPIO_2.1DIR
0 = Outputs, 1 = Inputs
0
0 = GPIO_2.0DIR
0 = Outputs, 1 = Inputs
Summary of Contents for TMS320DM365
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Page 18: ...Spectrum Digital Inc 1 8 DM365 EVM Technical Reference...
Page 83: ...A 1 Appendix A Schematics This appendix contains the schematics for the DM365 EVM...
Page 138: ...Spectrum Digital Inc B 2 DM365 EVM Technical Reference THIS DRAWING IS NOT TO SCALE...
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Page 140: ...Printed in U S A April 2009 510845 0001 Rev A...