Spectrum Digital TMS320DM365, Technical Reference

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Spectrum Digital, Inc
2-12 DM365 EVM Technical Reference
2.1.1.2.14 Register 13, Imager Internal I/O Direction Register 1
Register 13 is a 8 bit, read/write register that controls DM365 GPIO to IMAGER
connector pin input/output mapping. The default data is 0b00000000. This mapping is
shown in the table below.
2.1.1.2.15 Register 14, Imager Internal I/O Mux Register 2
Register 14 is a 8 bit, read/write register that controls DM365 GPIO Muxing to IMAGER
connector pin input. The default data is 0b00000000. The table below shows this
muxing.
Table 12: Register 13, Imager Internal I/O Direction Register 1
Bit # Function Mapping
7 0 = GPIO_MD16 to DM365 pin
0 = Outputs
1 = DM365 pins are inputs
6 0 = GPIO_MD15 to DM365 pin
0 = Outputs
1 = DM365 pins are inputs
5 0 = GPIO_MD14 to DM365 pin
0 = Outputs
1 = DM365 pins are inputs
4 0 = GPIO_MD13 to DM365 pin
0 = Outputs
1 = DM365 pins are inputs
3 0 = GPIO_MD12 to DM365 pin
0 = Outputs
1 = DM365 pins are inputs
2 0 = GPIO_MD11 to DM365 pin
0 = Outputs
1 = DM365 pins are inputs
1 0 = GPIO_MD10 to DM365 pin
0 = Outputs
1 = DM365 pins are inputs
0 0 = GPIO_MD9 to DM365 pin
0 = Outputs
1 = DM365 pins are inputs
Table 13: Register 12, Imager Internal I/O Mux Register 2
Bit # Muxing
7 0 = GPIO_MD12 MUX SELB
6 0 = GPIO_MD12 MUX SELA
5 0 = GPIO_MD11 MUX SELB
4 0 = GPIO_MD11 MUX SELA
3 0 = GPIO_MD10 MUX SELB
2 0 = GPIO_MD10 MUX SELA
1 0 = GPIO_MD9 MUX SELB
0 0 = GPIO_MD9 MUX SELA