Spectrum Digital TMS320DM365, Technical Reference

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Spectrum Digital, Inc
2-11
2.1.1.2.12 Register 11, Internal I/O Mux Register 0
Register 11 is a 8 bit, read/write register that controls DM365 GPIO Muxing to IMAGER
connector pin input. The default data is 0b00000000. The table below shows this
muxing.
2.1.1.2.13 Register 12, Internal I/O Mux Register 1
Register 12 is a 8 bit, read/write register that controls DM365 GPIO Muxing to IMAGER
connector pin input. The default data is 0b00000000. The table below shows this
muxing.
Table 10: Register 11, Internal I/O Mux Register 0
Bit # Muxing
7 0 = GPIO_MD4 MUX SELB
6 0 = GPIO_MD4 MUX SELA
5 0 = GPIO_MD3 MUX SELB
4 0 = GPIO_MD3 MUX SELA
3 0 = SPI4_SDI_GPIO_MD2 MUX SELB
2 0 = SPI4_SDI_GPIO_MD2 MUX SELA
1 0 = GPIO_MD1 MUX SELB
0 0 = GPIO_MD1 MUX SELA
Table 11: Register 12, Internal I/O Mux Register 1
Bit # Muxing
7 0 = GPIO_MD8 MUX SELB
6 0 = GPIO_MD8 MUX SELA
5 0 = GPIO_MD7 MUX SELB
4 0 = GPIO_MD7 MUX SELA
3 0 = GPIO_MD6 MUX SELB
2 0 = GPIO_MD6 MUX SELA
1 0 = GPIO_MD5 MUX SELB
0 0 = GPIO_MD5 MUX SELA