Spectrum Digital TMS320DM365, Technical Reference

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Spectrum Digital, Inc
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2.1.1.2.16 Register 15, Imager Internal I/O Mux Register 3
Register 14 is a 8 bit, read/write register that controls DM365 GPIO Muxing to IMAGER
connector pin input. The default data is 0b00000000. The table below shows this
muxing.
2.1.1.2.17 Register 16, Imager Internal I/O Direction Register 3
Register 16 is a 8 bit, read/write register that controls DM365 GPIO to IMAGER
connector pin input/output mapping. The default data is 0b00000000. This mapping is
shown in the table below.
Table 14: Register 15, Imager Internal I/O Mux Register 3
Bit # Muxing
7 0 = GPIO_MD16 MUX SELB
6 0 = GPIO_MD16 MUX SELA
5 0 = GPIO_MD15 MUX SELB
4 0 = GPIO_MD15 MUX SELA
3 0 = GPIO_MD14 MUX SELB
2 0 = GPIO_MD14 MUX SELA
1 0 = GPIO_MD13 MUX SELB
0 0 = GPIO_MD13 MUX SELA
Table 15: Register 16, Imager Internal I/O Direction Register 3
Bit # Function Mapping
7 Reserved
6 0 = CCD_DDS_RST to DM365 pin
0 = Outputs
1 = DM365 pins are inputs
5 0 = PWM_CCD_SUB to DM365 pin
0 = Outputs
1 = DM365 pins are inputs
4 0 = GPIO_TACH to DM365 pin
0 = Outputs
1 = DM365 pins are inputs
3 0 = GPIO_MST_SLV to DM365 pin
0 = Outputs
1 = DM365 pins are inputs
2 0 = GPIO_MD19 to DM365 pin
0 = Outputs
1 = DM365 pins are inputs
1 0 = GPIO_MD18 to DM365 pin
0 = Outputs
1 = DM365 pins are inputs
0 0 = GPIO_MD17 to DM365 pin
0 = Outputs
1 = DM365 pins are inputs